Thomas D

What other rotating register file architectures are you aware of? It’s a bit of an esoteric topic, and as such, hints are generally needed for research.

As for why the Mill isn’t mentioned, what is there to mention? Academia exists in the hubristic double-thought that it knows all things worth knowing (while simultaneously knowing that most of those things came from outside). As far as I know, there are no academic papers concerning the Mill, as the Mill is a commercial project through-and-through: it is the kind of project that papers will be written about in retrospect (if a product is ever launched). As such, there is nothing to really cite, except some videos of talks given at a university that were high-level and abstract in order to protect IP. That really is the nature of the project, and the nature of academia.

Right now, the Mill is a rumor, possibly another piece of industry vaporware, and this STRAIGHT is an academic play toy.

As far as I understand it, on the Mill the compiler converts each loop into a recursive function (which is a basic block). But that’s beside the point, as (as far as I understand it) the Mill’s predictor predicts that basic block A exits to basic block B. So, the cache loads basic block A, preloads basic block B, and the number of iterations are mostly meaningless to efficiency. Then again, I have slept many times since watching that talk.

Waiting to see how it plays out with Cowlishaw and IBM?

Fight me, old man. We can have a Hair-Off, to see who has the more glorious long hair.

Then again, given the reply numbers, I suspect that there is a more detailed conversation going on for Mill team members (who can see the posts that normal people can’t). You know, people think that it is an interesting (and important) concept and want to know more. I can only create so many POS emulators for hardware inspired by the hype (I have a new one on my GitHub). They only have the forum and the wiki. And both of those look dead.

Any news on when someone is going to regenerate the wiki?

A real problem with cloud computing providers is that they mainly deal in virtual x86 machines. As such, the Mill wouldn’t be judged by FLOPS/W, but rather “virtual x86 FLOPS”/W. If there were a market here, Transmeta would probably still be around. Then again, maybe Mill can be the new Transmeta.

Thanks for the answer.

So for any given configuration there will be customers who will tell us “if you would only increase the size of this feature then my program would run so much faster; pretty please with sugar!”. But as we scale any member’s configuration pretty soon we get to the performance of the next bigger member. So we’ll say “just buy the bigger member”, to which they will say “but that costs more money!”.

The best response to this is: “Not as much money as licensing the lesser member and having TSMC fab it with your specific changes.” (Well, if you are open to such an arrangement. Are you looking to be an Intel or an AMD?)

HELLO??? Did Ivan/Roger/Mark leave us and now this startup is dead, too?

According to source of Wikipedia, a 700MHz Transmeta Crusoe ran programs like a 500 MHz Pentium 3 (mobile-to-mobile, offerings as of Jan 2000).

If a 30% speed hit to run your code in WASM is “not a thing”, then what’s another 30% speed hit to use nearly a third the electricity (Crusoe’s 6W, Mobile P3 17W)? It’s not the 5-10x you’re looking for, but there’s still a margin there.

Security is a big deal, as it is difficult to implement security on insecure hardware, however, one of these days, some government is going to become wise to the amount of electricity we waste in computing….

I am a little confused by your answer. While you see the bb instruction as a herald instruction, hinting to the processor that a branch is coming, I see it more as a hint to the processor that the next block of instructions is a basic block. So, the instruction’s intent, to me, is to recreate a fundamental aspect of the Mill’s operation: that it computes on basic blocks (however, the Mill doesn’t do so for the same reason: it requires the compiler to optimize the data flow a priori, and uses the basic blocks for exit prediction and split-stream encoding). Or, am I missing something basic from my skim over the paper?

I don’t believe that I could deliver results commensurate with how exciting I find your work. As a consequent of turning a hobby into a bill-paying job, the job frequently saps my desire to perform my hobby (and given the paperwork that I signed for said job, I am frequently unsure of how to actually contribute to things of pith and moment). I’ll have to pass, for now.

Puke: Nevermind my tights, I thought we were talking about my pith.
Snot: That’s why you have to wash them out!

Conforming is now built into branch ops, so the only use of a separate op is to recover live values from the mix of live and dead, as you suggest. Consequently the former “conform” op is now spelled “rescue”.

When are you going to regenerate the wiki? I imagine that it is quite old at this point….