Mill Computing, Inc. Forums The Mill Architecture Characterizing the Belt

  • Author
    Posts
  • Thomas D
    Participant
    Post count: 16
    #3424 |

    So, I ran into this quote on Quora concerning the Mill:
    https://www.quora.com/What-do-you-think-about-the-Mill-CPU-Architecture

    The Belt appears to be a goofy way of approaching register renaming

    My take on what I have seen would be that the Belt attempts to do for register renaming what RISC did for the instruction set.
    To quote from random places in the Wikipedia page on RISC:

    Most RISC architectures have fixed-length instructions (commonly 32 bits) and a simple encoding, which simplifies fetch, decode, and issue logic considerably…. For any given level of general performance, a RISC chip will typically have far fewer transistors dedicated to the core logic…

    Do you think that this is a proper characterization of the Belt?

  • nachokb
    Participant
    Post count: 10

    Those characterizations have one thing going for them: there’s no Mill (yet); it doesn’t run any software (yet); OSs haven’t been ported to it (yet).

    So, skepticism is healthy.

    But I think they go too far in dismissing these ideas.

    My favorite: “Lack of object code compatibility between different family members implies a more embedded universe for the product, where the application is known ahead of time and doesn’t change much”. Android proved that’s not the case 10 years ago.

    In particular, the point you are quoting puzzles me. I’m not an expert in CPU design and _I can think of at least 2 ways it absolutely rocks_ (maybe I’m a sucker for immutability): instruction coding entropy and reducing the capacitive load (IIRC, there’s no big crossbar for 500+ registers).

    The part about SAS comes up time and again. The Mill guys _did_ explicitly described mechanisms to deal with fork, relocatable code, etc. They simply ignore all that. Maybe they missed it, which proves my point: everyone has such a strong opinion while _at the same time_ admitting _hey, I may be missing something_.

    It _is_ risky, of course. Let them fail. It’s not you, after all.

  • Thomas D
    Participant
    Post count: 16

    I wanted to note a characterization of the belt. Honestly, the Mill really is just an extension of RISC: it does small instructions, it doesn’t hide hazards (but finds ways for some to not be so hazardous), and burdens the compiler with making the most efficient code.

    To me, the most egregious statement made in any answer is

    The area that most concerned me about Mill’s ability to run general purpose software (e.g. Unix) was in

You must be logged in to reply to this topic.