Tokyo University STRAIGHT compiler

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Findecanor
Participant
June 7, 2023 at 11:58 am
Post count: 34
#3911 |
I stumbled over a few papers about another architecture that uses something similar to The Mill’s “Belt”. It is a research project at Tokyo University called STRAIGHT.
Apparently, instead of register renaming and three-address code, at each instruction they rotate the register file one step and place the result at index 0.
Otherwise it seems to be based on a quite ordinary out-of-order RISC-V design. They claim up to 18.8% performance gain in simulation of some benchmarks over the same processor with a traditional front-end, but I suspect that is simply an effect of having a larger register file window, enabled by not having to encode the destination register.
No mention of The Mill or of any previous rotating register file architectures that I know of in their paper, (hrmpf..)
But I thought it could be interesting to compare their compiler, anyway.
Architecture:
STRAIGHT: Hazardless Processor Architecture Without Register Renaming [PDF] 2018.
Compiler:
Compiling and Optimizing Real-world Programs for STRAIGHT ISA [PDF] 2021.
A Sound and Complete Algorithm for Code Generation in Distance-Based ISA [dl.acm.org] 2023.
(The forum software seems a bit finicky. This is the third time I try to post…)
Thomas D
Participant
June 19, 2023 at 6:55 pm
Post count: 24
#3924
What other rotating register file architectures are you aware of? It’s a bit of an esoteric topic, and as such, hints are generally needed for research.
As for why the Mill isn’t mentioned, what is there to mention? Academia exists in the hubristic double-thought that it knows all things worth knowing (while simultaneously knowing that most of those things came from outside). As far as I know, there are no academic papers concerning the Mill, as the Mill is a commercial project through-and-through: it is the kind of project that papers will be written about in retrospect (if a product is ever launched). As such, there is nothing to really cite, except some videos of talks given at a university that were high-level and abstract in order to protect IP. That really is the nature of the project, and the nature of academia.
Right now, the Mill is a rumor, possibly another piece of industry vaporware, and this STRAIGHT is an academic play toy.
- Findecanor
  Participant
  June 20, 2023 at 11:48 am
  Post count: 34
  #3925
  What other rotating register file architectures are you aware of?
  I think the most famous example would be Itanium, which can be configured to rotate a section of its register file in inner loops. It allows a loop to function in some ways like an unrolled loop without actually having to be unrolled.
  The AMD 29K is also well-known, although rotation is used for a different purpose: as a way to implement register windows in the calling convention.
  As far as I know, there are no academic papers concerning the Mill, … As such, there is nothing to really cite
  Something doesn’t necessarily have to be an academic paper itself to be cited in an academic paper. The important property is that the citation gives you enough information that you could retrieve your own copy of it, and count on it being identical to what is cited in the paper.
  If you’d want something formal to cite in this case, you could very well choose the patent.
  This reply was modified 1 year, 1 month ago by Findecanor.
  - Ivan Godard
    Keymaster
    June 21, 2023 at 7:12 am
    Post count: 689
    #3929
    STRAIGHT is interesting; it’s the only other temporally-addressed architecture that I know of, and I thank you for bringing it to my attention.
    The addressing (STRAIGHT vs Mill) is different: STRAIGHT refers to the generating instruction in time order, whereas Mill refers to the dropped result. In the hardware STRAIGHT uses a scoreboard approach to block for uncompleted instructions, while Mill uses full static scheduling. Some benefits are shared: no renaming, no encoded result registers. Some are peculiar to one or the other: Mill needs no reorder buffer, while straight need not track instruction retire time in the compiler.
    I wish them luck.
  - Ivan Godard
    Keymaster
    June 21, 2023 at 7:15 am
    Post count: 689
    #3930
    Itanium uses rotating registers as a cheap form of loop pipelining, but addressing is still spatial. Mill uses temporal addressing, which is quite different.
rmnw
Participant
November 7, 2023 at 4:06 am
Post count: 1
#3957
Update: two of the authors of the STRAIGHT paper are on a just released paper about a new architecture, Clockhands: https://www.rsg.ci.i.u-tokyo.ac.jp/members/shioya/pdfs/Koizumi-MICRO'23.pdf
This time there are multiple “belts”, as I understand it to eliminate move instructions when compiling phi nodes. Looks interesting, at least to my untrained eye. I came here because I was surprised they hadn’t mention the Mill in related work 🙁
Ivan Godard
Keymaster
November 7, 2023 at 10:39 pm
Post count: 689
#3958
The STRAIGHT addressing is not a belt because it uses ordinal instruction addressing, while a belt uses ordinal drop. But the new Clockhands addressing is a belt, pure and simple. Thank you for bringing it to our attention; we have contacted the authors. If it’s just a research project then it is our practice to grant royalty-free research licenses to our IP. However, if they plan to commercialize it, or even to seek patents without mentioning us, well, many happy lawyers.
Findecanor
Participant
January 19, 2024 at 8:07 am
Post count: 34
#3961
I read a rumour that someone from Mill Computing would have met the designers of STRAIGHT and Clockhands in person …
staff
Keymaster
January 19, 2024 at 7:00 pm
Post count: 49
#3962
At this time no in person meeting has taken place, nor is one currently planned…
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