loadtrs
load from memory
loadtrs(base base0, off op0, op off0, width scaled0, )
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
loadtrs(base base0, off op0, op op1, width off0, )
encoding:
loadtrs(base base0, off op0, op off0, width scaled0, )
,
flowArgs(pred op0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
loadtrs(base base0, off op0, op off0, width scaled0, tag tag0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
loadtrs(base base0, off op0, op op1, width off0, tag scaled0, pred tag0)
encoding:
loadtrs(base base0, off op0, op off0, width scaled0, tag tag0)
,
flowArgs(pred op0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
loadtrs(op op0, off op1, op off0, width scaled0, )
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
loadtrs(op op0, off op1, op op2, width off0, )
encoding:
loadtrs(op op0, off op1, op off0, width scaled0, )
,
flowArgs(pred op0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
loadtrs(op op0, off op1, op off0, width scaled0, tag tag0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
loadtrs(op op0, off op1, op op2, width off0, tag scaled0, pred tag0)
encoding:
loadtrs(op op0, off op1, op off0, width scaled0, tag tag0)
,
flowArgs(pred op0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 4 |
Copper | F0 | 4 |
Silver | F0 F1 F2 | 4 |
Gold | F0 | 4 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable