shiftrsffz

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speculable  exu stream  exu block  compute phase   operation   in the signed fixed point value domain   that produces condition codes and rounds to nearest, ties away from zero

native on: all

Signed fixed point shift right. Rounds towards nearest away from zero. When shifting fixed point values to the right the least significant bit can be treated differently according to the same different rounding strategies that apply to floating point values as well.


shiftrsffz(sf x, bit bits) → sf r0

operands: like Shift [xi:x]


Core In Slots Latencies
Tin E0
Copper E0
Silver E0 E1
Gold E0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable