mulsfwp
From Mill Computing Wiki
speculable exu stream exu block compute phase operation in the signed fixed point value domain using widening overflow behavior that produces condition codes and rounds toward positive infinity
native on: all
Signed Fixed Point multiply. Rounds towards positive infinity. Widening.
mulsfwp(sf x, sf y, bit dot) → sf r0
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | |
| Copper | E0 | |
| Silver | E0 E1 | |
| Gold | E0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
