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Mill Computing Wiki - New pages [en]
2024-03-28T21:33:12Z
From Mill Computing Wiki
MediaWiki 1.23.1
http://millcomputing.com/wiki/Instruction_Set/f2ufip
Instruction Set/f2ufip
2021-02-23T14:14:54Z
<p>Generator: Protected "Instruction Set/f2ufip": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2ufip}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward positive infinity]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2ufip</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2ufip|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/neqfb
Instruction Set/neqfb
2021-02-23T14:14:52Z
<p>Generator: Protected "Instruction Set/neqfb": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:neqfb}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
not equal<br />
----<br />
<code style="font-size:130%"><b style="color:#050">neqfb</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddfb|like Addfb [fx:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#neqfb|Silver]] || E0 E1 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2ufisn
Instruction Set/f2ufisn
2021-02-23T14:14:51Z
<p>Generator: Protected "Instruction Set/f2ufisn": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2ufisn}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2ufisn</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2ufisn|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sdexe
Instruction Set/f2sdexe
2021-02-23T14:14:46Z
<p>Generator: Protected "Instruction Set/f2sdexe": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sdexe}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using excepting overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties toward even adjacent value]]<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sdexe</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/storepflss
Instruction Set/storepflss
2021-02-23T14:14:39Z
<p>Generator: Protected "Instruction Set/storepflss": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:storepflss}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|writer phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointer value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
store to memory<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepflss</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepflss</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt <br />
operand from opsWindow">op2</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storepflss</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepflss</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepflss</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt<br />
operand from opsWindow">op3</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storepflss</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/storeus
Instruction Set/storeus
2021-02-23T14:14:38Z
<p>Generator: Protected "Instruction Set/storeus": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:storeus}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|writer phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
store to memory<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storeus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storeus|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storeus|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storeus|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storeus|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storeus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storeus|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storeus|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storeus|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storeus|Gold]] || F0 || 1<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/loadtr
Instruction Set/loadtr
2021-02-23T14:14:36Z
<p>Generator: Protected "Instruction Set/loadtr": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:loadtr}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|writer phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
load from memory<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">width0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">off0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">width0</span></i>, )</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">tag0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name <br />
for a speculative load (in load)">width0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">off0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name <br />
for a speculative load (in load)">tag0</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">width0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">tag0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name <br />
for a speculative load (in load)">width0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">width0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">off0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">width0</span></i>, )</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">tag0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">width0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">off0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">tag0</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">width0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (flow)">tag0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">width0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadtr|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadtr|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadtr|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadtr|Gold]] || F0 || 3<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/integerfifz
Instruction Set/integerfifz
2021-02-23T14:14:35Z
<p>Generator: Protected "Instruction Set/integerfifz": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:integerfifz}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties away from zero]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
round to integral-valued float<br />
----<br />
<code style="font-size:130%"><b style="color:#050">integerfifz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#integerfifz|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sfisn
Instruction Set/f2sfisn
2021-02-23T14:14:32Z
<p>Generator: Protected "Instruction Set/f2sfisn": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sfisn}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sfisn</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2sfisn|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2udi
Instruction Set/f2udi
2021-02-23T14:14:31Z
<p>Generator: Protected "Instruction Set/f2udi": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2udi}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2udi</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/rsub
Instruction Set/rsub
2021-02-23T14:14:30Z
<p>Generator: Protected "Instruction Set/rsub": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:rsub}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' rsubs rsubu rsubs2 rsubu2 <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
reverse subtraction<br />
----<br />
<code style="font-size:130%"><b style="color:#050">rsub</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#imm|imm]]</span> <span title="small immediate constant of per-slot varying range">imm0</span></i>) &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#rsub|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#rsub|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#rsub|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#rsub|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/gtrfxb
Instruction Set/gtrfxb
2021-02-23T14:14:28Z
<p>Generator: Protected "Instruction Set/gtrfxb": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:gtrfxb}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
greater than<br />
----<br />
<code style="font-size:130%"><b style="color:#050">gtrfxb</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddfb|like Addfb [fx:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#gtrfxb|Silver]] || E0 E1 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2udesn
Instruction Set/f2udesn
2021-02-23T14:14:27Z
<p>Generator: Protected "Instruction Set/f2udesn": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2udesn}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2udesn</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/fma
Instruction Set/fma
2021-02-23T14:14:25Z
<p>Generator: Protected "Instruction Set/fma": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:fma}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' fmas fmau fmas2 fmau2 <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
fused multiply-add or -add/subtract<br />
----<br />
<code style="font-size:130%"><b style="color:#050">fma</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op1</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops <br />
window">op2</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#fma|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#fma|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#fma|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#fma|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/carryb
Instruction Set/carryb
2021-02-23T14:14:24Z
<p>Generator: Protected "Instruction Set/carryb": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:carryb}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores/Tin|Tin]] [[Cores/Copper|Copper]] [[Cores/Gold|Gold]] <br /><br />
</div><br />
<br />
carry/borrow gang predicate<br />
----<br />
<code style="font-size:130%"><b style="color:#050">carryb</b>() &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentityb|like Identityb [xx:x]]]<br />
&nbsp;&nbsp;'''native on:''' [[Cores/Copper|Copper]] [[Cores/Tin|Tin]] [[Cores/Gold|Gold]] </div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#carryb|Tin]] || E1 || <br />
|-<br />
| [[Cores/Copper/Encoding#carryb|Copper]] || E1 || <br />
|-<br />
| [[Cores/Gold/Encoding#carryb|Gold]] || E1 || <br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">carryb</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentityb|like Identityb [xx:x]]]<br />
&nbsp;&nbsp;'''native on:''' [[Assembly|none]]</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#carryb|Tin]] || || <br />
|-<br />
| [[Cores/Copper/Encoding#carryb|Copper]] || || <br />
|-<br />
| [[Cores/Gold/Encoding#carryb|Gold]] || || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/widend2
Instruction Set/widend2
2021-02-23T14:14:22Z
<p>Generator: Protected "Instruction Set/widend2": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:widend2}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
widen to double width<br />
----<br />
<code style="font-size:130%"><b style="color:#050">widend2</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub>, [[Domains#d|d]] r<sub>1</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWidenvd|like Widenvd DD:2D2D]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/fmass
Instruction Set/fmass
2021-02-23T14:14:21Z
<p>Generator: Protected "Instruction Set/fmass": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:fmass}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' fmass2 <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
fused multiply-add or -add/subtract<br />
----<br />
<code style="font-size:130%"><b style="color:#050">fmass</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op1</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops <br />
window">op2</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#fmass|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#fmass|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#fmass|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#fmass|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sfisfz
Instruction Set/f2sfisfz
2021-02-23T14:14:20Z
<p>Generator: Protected "Instruction Set/f2sfisfz": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sfisfz}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties away from zero]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sfisfz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2sfisfz|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/rrootfn
Instruction Set/rrootfn
2021-02-23T14:14:10Z
<p>Generator: Protected "Instruction Set/rrootfn": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:rrootfn}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
reciprocal square root<br />
----<br />
<code style="font-size:130%"><b style="color:#050">rrootfn</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#rrootfn|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/neqb
Instruction Set/neqb
2021-02-23T14:14:09Z
<p>Generator: Protected "Instruction Set/neqb": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:neqb}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
not equal<br />
----<br />
<code style="font-size:130%"><b style="color:#050">neqb</b>() &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentityb|like Identityb [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#neqb|Tin]] || E0 E1 || <br />
|-<br />
| [[Cores/Copper/Encoding#neqb|Copper]] || E0 E1 || <br />
|-<br />
| [[Cores/Silver/Encoding#neqb|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#neqb|Gold]] || E0 E1 || <br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">neqb</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentityb|like Identityb [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#neqb|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#neqb|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#neqb|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#neqb|Gold]] || E0 || <br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">neqb</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#imm|imm]]</span> <span title="small immediate constant of per-slot varying range">imm0</span></i>) &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentityb|like Identityb [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#neqb|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#neqb|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#neqb|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#neqb|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2ufixfz
Instruction Set/f2ufixfz
2021-02-23T14:14:07Z
<p>Generator: Protected "Instruction Set/f2ufixfz": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2ufixfz}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using excepting overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties away from zero]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2ufixfz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2ufixfz|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/rrootfz
Instruction Set/rrootfz
2021-02-23T14:14:06Z
<p>Generator: Protected "Instruction Set/rrootfz": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:rrootfz}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward zero]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
reciprocal square root<br />
----<br />
<code style="font-size:130%"><b style="color:#050">rrootfz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#rrootfz|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sdep
Instruction Set/f2sdep
2021-02-23T14:13:48Z
<p>Generator: Protected "Instruction Set/f2sdep": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sdep}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward positive infinity]]<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sdep</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2ufise
Instruction Set/f2ufise
2021-02-23T14:13:47Z
<p>Generator: Protected "Instruction Set/f2ufise": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2ufise}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties toward even adjacent value]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2ufise</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2ufise|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2ufi
Instruction Set/f2ufi
2021-02-23T14:13:41Z
<p>Generator: Protected "Instruction Set/f2ufi": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2ufi}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2ufi</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2ufi|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/integerfep
Instruction Set/integerfep
2021-02-23T14:13:40Z
<p>Generator: Protected "Instruction Set/integerfep": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:integerfep}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward positive infinity]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
round to integral-valued float<br />
----<br />
<code style="font-size:130%"><b style="color:#050">integerfep</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#integerfep|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/isNoneb
Instruction Set/isNoneb
2021-02-23T14:13:37Z
<p>Generator: Protected "Instruction Set/isNoneb": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:isNoneb}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
test for None-hood<br />
----<br />
<code style="font-size:130%"><b style="color:#050">isNoneb</b>() &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentityb|like Identityb [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#isNoneb|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#isNoneb|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#isNoneb|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#isNoneb|Gold]] || E0 || <br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">isNoneb</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentityb|like Identityb [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#isNoneb|Tin]] || E0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#isNoneb|Copper]] || E0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#isNoneb|Silver]] || E0 E1 E2 E3 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#isNoneb|Gold]] || E0 || 1<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/isntNilp
Instruction Set/isntNilp
2021-02-23T14:13:36Z
<p>Generator: Protected "Instruction Set/isntNilp": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:isntNilp}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointer value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
test for non-nil pointer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">isntNilp</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#p|p]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeEqlp|like Eqlp [pp:p]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#isntNilp|Tin]] || E0 || 2<br />
|-<br />
| [[Cores/Copper/Encoding#isntNilp|Copper]] || E0 || 2<br />
|-<br />
| [[Cores/Silver/Encoding#isntNilp|Silver]] || E0 E1 E2 E3 || 2<br />
|-<br />
| [[Cores/Gold/Encoding#isntNilp|Gold]] || E0 || 2<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sden
Instruction Set/f2sden
2021-02-23T14:13:33Z
<p>Generator: Protected "Instruction Set/f2sden": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sden}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sden</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/loadflus
Instruction Set/loadflus
2021-02-23T14:13:30Z
<p>Generator: Protected "Instruction Set/loadflus": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:loadflus}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|writer phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
load from memory<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and <br />
vector length (flow)">scaled0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and <br />
vector length (flow)">off0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and <br />
vector length (flow)">scaled0</span></i>, )</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and <br />
vector length (flow)">scaled0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">tag0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and <br />
vector length (flow)">off0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">scaled0</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit <br />
predicate from belt">tag0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">base0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and <br />
vector length (flow)">scaled0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">tag0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data <br />
width and vector length (flow)">scaled0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op2</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data <br />
width and vector length (flow)">off0</span></i>, )</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data <br />
width and vector length (flow)">scaled0</span></i>, )</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data <br />
width and vector length (flow)">scaled0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">tag0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op2</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data <br />
width and vector length (flow)">off0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">scaled0</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated <br />
1-bit predicate from belt">tag0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">loadflus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">off0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data <br />
width and vector length (flow)">scaled0</span></i>, <span style="color:#009">[[Sources#tag|tag]]</span> <span title="name for a speculative load (in load)">tag0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#loadflus|Tin]] || F0 || 3<br />
|-<br />
| [[Cores/Copper/Encoding#loadflus|Copper]] || F0 || 3<br />
|-<br />
| [[Cores/Silver/Encoding#loadflus|Silver]] || F0 F1 F2 || 3<br />
|-<br />
| [[Cores/Gold/Encoding#loadflus|Gold]] || F0 || 3<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/rsubsx
Instruction Set/rsubsx
2021-02-23T14:13:29Z
<p>Generator: Protected "Instruction Set/rsubsx": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:rsubsx}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp; [[Overflow|using excepting overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' rsubsx2 <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
reverse subtraction<br />
----<br />
<code style="font-size:130%"><b style="color:#050">rsubsx</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#imm|imm]]</span> <span title="small immediate constant of per-slot varying range">imm0</span></i>) &#8594; [[Domains#s|s]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#rsubsx|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#rsubsx|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#rsubsx|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#rsubsx|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2udisp
Instruction Set/f2udisp
2021-02-23T14:13:26Z
<p>Generator: Protected "Instruction Set/f2udisp": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2udisp}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward positive infinity]]<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2udisp</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/widens2
Instruction Set/widens2
2021-02-23T14:13:24Z
<p>Generator: Protected "Instruction Set/widens2": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:widens2}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
widen to double width<br />
----<br />
<code style="font-size:130%"><b style="color:#050">widens2</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#s|s]] r<sub>0</sub>, [[Domains#s|s]] r<sub>1</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWidenv|like Widenv XX:2X2X]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#widens2|Tin]] || E0 || 2<br />
|-<br />
| [[Cores/Copper/Encoding#widens2|Copper]] || E0 || 2<br />
|-<br />
| [[Cores/Silver/Encoding#widens2|Silver]] || E0 E1 E2 E3 || 2<br />
|-<br />
| [[Cores/Gold/Encoding#widens2|Gold]] || E0 || 2<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2uden
Instruction Set/f2uden
2021-02-23T14:13:23Z
<p>Generator: Protected "Instruction Set/f2uden": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2uden}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
convert float to unsigned integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2uden</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/storetrus
Instruction Set/storetrus
2021-02-23T14:13:20Z
<p>Generator: Protected "Instruction Set/storetrus": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:storetrus}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|writer phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
store to memory<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrus|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrus|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrus|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrus|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt <br />
operand from opsWindow">op2</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storetrus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrus|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrus|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrus|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrus|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrus|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrus|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrus|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrus|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt<br />
operand from opsWindow">op3</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storetrus</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrus|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrus|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrus|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrus|Gold]] || F0 || 1<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/rrootffz
Instruction Set/rrootffz
2021-02-23T14:13:19Z
<p>Generator: Protected "Instruction Set/rrootffz": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:rrootffz}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties away from zero]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
reciprocal square root<br />
----<br />
<code style="font-size:130%"><b style="color:#050">rrootffz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#rrootffz|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sfisp
Instruction Set/f2sfisp
2021-02-23T14:13:18Z
<p>Generator: Protected "Instruction Set/f2sfisp": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sfisp}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward positive infinity]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sfisp</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2sfisp|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/incswpost
Instruction Set/incswpost
2021-02-23T14:12:55Z
<p>Generator: Protected "Instruction Set/incswpost": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:incswpost}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp; [[Overflow|using widening overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
increment and compare with second argument<br />
----<br />
<code style="font-size:130%"><b style="color:#050">incswpost</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWidening|like Widening xx:2x]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#incswpost|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#incswpost|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#incswpost|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#incswpost|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/incsspost
Instruction Set/incsspost
2021-02-23T14:12:53Z
<p>Generator: Protected "Instruction Set/incsspost": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:incsspost}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' incss2post <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
increment and compare with second argument<br />
----<br />
<code style="font-size:130%"><b style="color:#050">incsspost</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#incsspost|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#incsspost|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#incsspost|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#incsspost|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/incupre
Instruction Set/incupre
2021-02-23T14:12:51Z
<p>Generator: Protected "Instruction Set/incupre": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:incupre}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' incu2pre <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
increment and compare with second argument<br />
----<br />
<code style="font-size:130%"><b style="color:#050">incupre</b>(<span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#u|u]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#incupre|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#incupre|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#incupre|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#incupre|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sfesz
Instruction Set/f2sfesz
2021-02-23T14:12:49Z
<p>Generator: Protected "Instruction Set/f2sfesz": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sfesz}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward zero]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sfesz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2sfesz|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/f2sfefz
Instruction Set/f2sfefz
2021-02-23T14:12:48Z
<p>Generator: Protected "Instruction Set/f2sfefz": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:f2sfefz}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties away from zero]]<br /><br />
'''native on:''' [[Cores/Silver|Silver]] <br /><br />
</div><br />
<br />
convert float to signed integer<br />
----<br />
<code style="font-size:130%"><b style="color:#050">f2sfefz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddf|like Addf [ff:f]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Silver/Encoding#f2sfefz|Silver]] || E0 E1 || rw:rw=3 rd:rd=4 rq:rq=5 rvw:rvw=3 rvd:rvd=4 rvq:rvq=5 <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/storepfls
Instruction Set/storepfls
2021-02-23T14:12:38Z
<p>Generator: Protected "Instruction Set/storepfls": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:storepfls}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|writer phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointer value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
store to memory<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepfls</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepfls</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt <br />
operand from opsWindow">op2</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storepfls</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepfls</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storepfls</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt<br />
operand from opsWindow">op3</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storepfls</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/narrows2
Instruction Set/narrows2
2021-02-23T14:12:34Z
<p>Generator: Protected "Instruction Set/narrows2": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:narrows2}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
narrow scalar to half width<br />
----<br />
<code style="font-size:130%"><b style="color:#050">narrows2</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeNarrowv|like Narrowv [XX:&#189;x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#narrows2|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#narrows2|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#narrows2|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#narrows2|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/storetrs
Instruction Set/storetrs
2021-02-23T14:12:32Z
<p>Generator: Protected "Instruction Set/storetrs": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:storetrs}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|writer phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
store to memory<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrs</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrs|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrs|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrs|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrs|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrs</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt <br />
operand from opsWindow">op2</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storetrs</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op1</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt <br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrs|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrs|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrs|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrs|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrs</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrs|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrs|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrs|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrs|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">storetrs</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt<br />
operand from opsWindow">op3</span>, <span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">off0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">storetrs</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op2</span></i>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt<br />
operand from opsWindow">off0</span>)</code><br />
, <br />
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#pred|pred]]</span> <span title="late-evaluated 1-bit predicate from belt">op0</span>)</code><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#storetrs|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#storetrs|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#storetrs|Silver]] || F0 F1 F2 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#storetrs|Gold]] || F0 || 1<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/floatArgsp
Instruction Set/floatArgsp
2021-02-23T14:12:31Z
<p>Generator: Protected "Instruction Set/floatArgsp": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:floatArgsp}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp; [[Rounding|and rounds toward positive infinity]]<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
mode control for ganged floating point operation<br />
----<br />
<code style="font-size:130%"><b style="color:#050">floatArgsp</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
'''encoding:''' <br />
<code style="font-size:100%"><b style="color:#050">floatArgsp</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>)</code><br />
<br /><br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#floatArgsp|Tin]] || E0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#floatArgsp|Copper]] || E0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#floatArgsp|Silver]] || E0 E1 E2 E3 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#floatArgsp|Gold]] || E0 || 1<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/rsubuw2
Instruction Set/rsubuw2
2021-02-23T14:12:29Z
<p>Generator: Protected "Instruction Set/rsubuw2": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:rsubuw2}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp; [[Overflow|using widening overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
reverse subtraction<br />
----<br />
<code style="font-size:130%"><b style="color:#050">rsubuw2</b>(<span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#imm|imm]]</span> <span title="small immediate constant of per-slot varying range">imm0</span></i>) &#8594; [[Domains#u|u]] r<sub>0</sub>, [[Domains#u|u]] r<sub>1</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWideningv|like Wideningv XX:2X2X]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#rsubuw2|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#rsubuw2|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#rsubuw2|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#rsubuw2|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/geqdb
Instruction Set/geqdb
2021-02-23T14:12:27Z
<p>Generator: Protected "Instruction Set/geqdb": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:geqdb}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Assembly|none]]<br /><br />
</div><br />
<br />
greater than or equal<br />
----<br />
<code style="font-size:130%"><b style="color:#050">geqdb</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAdddb|like Adddb [dx:d]]]<br />
</div><br />
<br /><br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/cachepx
Instruction Set/cachepx
2021-02-23T14:12:24Z
<p>Generator: Protected "Instruction Set/cachepx": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:cachepx}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointer value domain]]&nbsp;&nbsp;<br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
cache control operation<br />
----<br />
<code style="font-size:130%"><b style="color:#050">cachepx</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op0</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeCache|like Cache xx:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#cachepx|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#cachepx|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#cachepx|Silver]] || F0 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#cachepx|Gold]] || F0 || 1<br />
|}<br />
<br />
----<br />
<code style="font-size:130%"><b style="color:#050">cachepx</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op0</span>, <span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">op1</span>)</code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeCache|like Cache xx:]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#cachepx|Tin]] || F0 || 1<br />
|-<br />
| [[Cores/Copper/Encoding#cachepx|Copper]] || F0 || 1<br />
|-<br />
| [[Cores/Silver/Encoding#cachepx|Silver]] || F0 || 1<br />
|-<br />
| [[Cores/Gold/Encoding#cachepx|Gold]] || F0 || 1<br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/incsspre
Instruction Set/incsspre
2021-02-23T14:12:22Z
<p>Generator: Protected "Instruction Set/incsspre": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:incsspre}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp; [[Overflow|using saturating overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' incss2pre <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
increment and compare with second argument<br />
----<br />
<code style="font-size:130%"><b style="color:#050">incsspre</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#incsspre|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#incsspre|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#incsspre|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#incsspre|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator
http://millcomputing.com/wiki/Instruction_Set/incspost
Instruction Set/incspost
2021-02-23T14:12:21Z
<p>Generator: Protected "Instruction Set/incspost": generated ([Edit=&lt;protect-level-bot&gt;] (indefinite) [Move=&lt;protect-level-bot&gt;] (indefinite))</p>
<hr />
<div>{{DISPLAYTITLE:incspost}}<br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed integer value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br /><br />
'''aliases:''' incs2post <br /><br />
'''native on:''' [[Cores|all]]<br /><br />
</div><br />
<br />
increment and compare with second argument<br />
----<br />
<code style="font-size:130%"><b style="color:#050">incspost</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op1</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code><br />
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]<br />
</div><br />
<br /><br />
<br />
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"<br />
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]<br />
|-<br />
| [[Cores/Tin/Encoding#incspost|Tin]] || E0 || <br />
|-<br />
| [[Cores/Copper/Encoding#incspost|Copper]] || E0 || <br />
|-<br />
| [[Cores/Silver/Encoding#incspost|Silver]] || E0 E1 E2 E3 || <br />
|-<br />
| [[Cores/Gold/Encoding#incspost|Gold]] || E0 || <br />
|}<br />
<br />
<br />
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]</div>
Generator