Difference between revisions of "Instruction Set/widend"

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{{DISPLAYTITLE:widend}}
 
{{DISPLAYTITLE:widend}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp;<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp;<br />
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
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'''native on:''' [[Assembly|none]]<br />
 
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----
 
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<code style="font-size:130%"><b style="color:#050">widend</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">v</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
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<code style="font-size:130%"><b style="color:#050">widend</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (exu)">width0</span></i>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWidend|like Widend dd:2d]]
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWidend|like Widend dd:2d]]
 
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<br />
 
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{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
| [[Cores/Decimal8/Encoding#widend|Decimal8]] || E0 E1 || 2
 
|-
 
| [[Cores/Decimal16/Encoding#widend|Decimal16]] || E0 E1 || 2
 
|}
 
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:14, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the decimal floating point value domain  

native on: none

Double the scalar width of a decimal float.

Decimal floats can be 4-16 byte wide. Although the 4 byte format is a pure interchange format and no floating arithmetic operations are available for them.



widend(d op0, width width0) → d r0

operands: like Widend dd:2d



Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable