rd

From Mill Computing Wiki
Revision as of 06:58, 2 October 2014 by Shookie (Talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search
realizing  exu stream  reader block  reader phase   operation   in the logical value domain  

native on: all

hardware reader

rd(const src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0

rd(scratch src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0

rd(reg src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0

rd(stream src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0
Retrieved from "http://millcomputing.com/w/index.php?title=Instruction_Set/rd&oldid=854"