Difference between revisions of "Instruction Set/muluw"

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multiplication
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Unsigned integer multiply. Widening.
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<code style="font-size:130%"><b style="color:#050">muluw</b>(<span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#u|u]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">muluw</b>(<span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#u|u]] r<sub>0</sub></code>

Revision as of 18:52, 20 December 2014

realizing  exu stream  exu block  compute phase   operation   in the unsigned integer value domain   using widening overflow behavior   that produces condition codes

native on: all

Unsigned integer multiply. Widening.


muluw(u x, u y) → u r0

operands: like Widen xx:2x


Core In Slots Latencies
Tin E0 b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6
Copper E0 b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6
Silver E0 E1 b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6
Gold E0 E1 E2 E3 b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6
Decimal8 E0 E1 b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6
Decimal16 E0 E1 b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6


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