Difference between revisions of "Instruction Set/mulf"

From Mill Computing Wiki
Jump to: navigation, search
m (Protected "Instruction Set/mulf": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite)))
 
(One intermediate revision by the same user not shown)
Line 1:Line 1:
 
{{DISPLAYTITLE:mulf}}
 
{{DISPLAYTITLE:mulf}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br />
'''native on:''' [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] <br />
+
'''native on:''' [[Cores/Silver|Silver]] <br />
 
</div>
 
</div>
  
Line 15:Line 15:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Silver/Encoding#mulf|Silver]] || E0 E1 || w,w:w=4 wv,wv:wv=4 d,d:d=5 dv,dv:dv=5 q,q:q=6 qv,qv:qv=6
+
| [[Cores/Silver/Encoding#mulf|Silver]] || E0 E1 ||  
|-
+
| [[Cores/Gold/Encoding#mulf|Gold]] || E0 E1 E2 E3 || w,w:w=4 wv,wv:wv=4 d,d:d=5 dv,dv:dv=5 q,q:q=6 qv,qv:qv=6
+
 
|}
 
|}
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:07, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the binary floating point value domain   that produces condition codes and rounds use current dynamic rounding mode

native on: Silver

Floating point multplication in current rounding mode.


mulf(f x, f y) → f r0

operands: like Addf [ff:f]


Core In Slots Latencies
Silver E0 E1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable