left

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realizing  exu stream  exu block  compute phase   operation   in the logical value domain  

native on: all

Count leading false in or construct bool vector with leading false.


left(op v) → op r0

operands: like Leftv XX:i

This counts the leading false elements in a bool vector.

Core In Slots Latencies
Tin E0 1
Copper E0 E1 1
Silver E0 E1 E2 E3 1
Gold E0 E1 E2 E3 E4 E5 E6 E7 1
Decimal8 E0 E1 E2 E3 1
Decimal16 E0 E1 E2 E3 1

left(op x, width w) → op r0

operands: like Lefts xx:X

Constructs a bool vector with w elements of which the leading x elements are false and the rest true.

Core In Slots Latencies
Tin E0 1
Copper E0 E1 1
Silver E0 E1 E2 E3 1
Gold E0 E1 E2 E3 E4 E5 E6 E7 1
Decimal8 E0 E1 E2 E3 1
Decimal16 E0 E1 E2 E3 1


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