Difference between revisions of "Instruction Set/f2uds"

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(Created page with "{{DISPLAYTITLE:f2uds}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream [[Decode|exu block]...")
 
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convert float to unsigned integer
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Inexactly convert a decimal floating point value to a unsigned integer, in current rounding mode and producing saturating result values.
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<code style="font-size:130%"><b style="color:#050">f2uds</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">f2uds</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>

Revision as of 10:19, 12 November 2014

realizing  exu stream  exu block  compute phase   operation   in the decimal floating point value domain   using saturating overflow behavior   that produces condition codes

native on: Decimal8 Decimal16

Inexactly convert a decimal floating point value to a unsigned integer, in current rounding mode and producing saturating result values.


f2uds(d x) → d r0

operands: like Addd [dd:d]


Core In Slots Latencies
Decimal8 E0 E1 d:d=4 dv:dv=4 q:q=5 qv:qv=5
Decimal16 E0 E1 d:d=4 dv:dv=4 q:q=5 qv:qv=5