Difference between revisions of "Instruction Set/adddz"

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(Created page with "{{DISPLAYTITLE:adddz}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream [[Decode|exu block]...")
 
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addition
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Decimal floating point add in current rounding towards zero.
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<code style="font-size:130%"><b style="color:#050">adddz</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">adddz</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>

Revision as of 10:18, 12 November 2014

realizing  exu stream  exu block  compute phase   operation   in the decimal floating point value domain   that produces condition codes

native on: Decimal8 Decimal16

Decimal floating point add in current rounding towards zero.


adddz(d x, d y) → d r0

operands: like Addd [dd:d]


Core In Slots Latencies
Decimal8 E0 E1 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
Decimal16 E0 E1 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5