Difference between revisions of "Cores"
From Mill Computing Wiki
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|<b>[[Cores/Copper|Copper]]</b> | |<b>[[Cores/Copper|Copper]]</b> | ||
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|<b>[[Cores/Silver|Silver]]</b> | |<b>[[Cores/Silver|Silver]]</b> | ||
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|<b>[[Cores/Gold|Gold]]</b> | |<b>[[Cores/Gold|Gold]]</b> | ||
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|<b>[[Cores/Decimal8|Decimal8]]</b> | |<b>[[Cores/Decimal8|Decimal8]]</b> | ||
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|<b>[[Cores/Decimal16|Decimal16]]</b> | |<b>[[Cores/Decimal16|Decimal16]]</b> | ||
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Revision as of 15:11, 4 December 2014
The Mill Architecture describes a family of processor cores so that each family member can serve its own unique set of requirements and work loads. For the time being all defined Mill cores are purely simulated and cover a pretty generalistic range of profiles.
The difference between Tin and Copper may not be apparent from this table, but the second exu and flow Slots on Tin are reduced to an absolute minimum and don't even contain any ALU or branch Functional Units respectively.
| Belt | Scalar | Vector | Pipelines | Retire Stations | Scratchpad | Spiller Buffers/Stack | iCache Line | float | decimal | |
|---|---|---|---|---|---|---|---|---|---|---|
| Tin | 8 | 64bit | 8B | 13 | 8 | 128B | 8/16MB | 16B | ✘ | ✘ |
| slots | reader: 2 writer: 2 pick: 1 exu: 2 flow: 2 | |||||||||
| Copper | 8 | 64bit | 8B | 13 | 8 | 128B | 8/16MB | 16B | ✘ | ✘ |
| slots | reader: 2 writer: 2 pick: 1 exu: 2 flow: 2 | |||||||||
| Silver | 16 | 64bit | 16B | 25 | 16 | 256B | 16/256MB | 32B | ✔ | ✘ |
| slots | reader: 6 writer: 5 pick: 2 exu: 4 flow: 4 | |||||||||
| Gold | 32 | 128bit | 32B | 37 | 16 | 512B | 16/256MB | 64B | ✔ | ✘ |
| slots | reader: 8 writer: 5 pick: 4 exu: 8 flow: 8 | |||||||||
| Decimal8 | 16 | 64bit | 8B | 25 | 16 | 256B | 16/256MB | 32B | ✘ | ✔ |
| slots | reader: 6 writer: 5 pick: 2 exu: 4 flow: 4 | |||||||||
| Decimal16 | 16 | 64bit | 16B | 25 | 16 | 256B | 16/256MB | 32B | ✘ | ✔ |
| slots | reader: 6 writer: 5 pick: 2 exu: 4 flow: 4 | |||||||||
