divRems
From Mill Computing Wiki
speculable exu stream exu block compute phase operation in the signed integer value domain that produces condition codes
native on: Silver
Signed integer division for quotient and remainder.
related operations: divs, rems, rdivs, roots, rroots
divRems(s x, s y) → s r0, s r1
operands: like DivRem [xx:xx]
| Core | In Slots | Latencies |
|---|---|---|
| Silver | E0 |
divRems(s x, imm y) → s r0, s r1
operands: like DivRem [xx:xx]
| Core | In Slots | Latencies |
|---|---|---|
| Silver | E0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
