addss
From Mill Computing Wiki
realizing exu stream exu block compute phase operation in the signed integer value domain using saturating overflow behavior that produces condition codes
aliases: addssv
native on: all
Saturating signed integer addition. When a result value overflows or underflows for the width, it flats out at the biggest or smallest value respectively.
operands: like Identity [xx:x]
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | 2 |
Copper | E0 E1 | 2 |
Silver | E0 E1 E2 E3 | 2 |
Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 2 |
Decimal8 | E0 E1 E2 E3 | 2 |
Decimal16 | E0 E1 E2 E3 | 2 |
operands: like Identity [xx:x]
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | 2 |
Copper | E0 E1 | 2 |
Silver | E0 E1 E2 E3 | 2 |
Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 2 |
Decimal8 | E0 E1 E2 E3 | 2 |
Decimal16 | E0 E1 E2 E3 | 2 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable