narrowus

realizing  exu stream  exu block  compute phase   operation   in the unsigned integer value domain   using saturating overflow behavior  

native on: all

Half the width of an unsigned integer value. Saturating on overflow.

This is not a Speculable operation. The reason for this is the impossibility to fit all of the NaR payload into values smaller than 32bit. Nominally this would only require the narrowing of 32bit values to be not speculable, but for simplicity reasons in hardware and compiler this is not so. If narrowing should prove a big bottleneck this can be revisited.

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narrowus(u v) → u r0

operands: like Narrow [xx:½x]

Core	In Slots	Latencies
Tin	E0	2
Copper	E0 E1	2
Silver	E0 E1 E2 E3	2
Gold	E0 E1 E2 E3 E4 E5 E6 E7	2
Decimal8	E0 E1 E2 E3	2
Decimal16	E0 E1 E2 E3	2

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narrowus(u v1, u v2) → u r0

operands: like Narrowv [XX:½x]

Core	In Slots	Latencies
Tin	E0	2
Copper	E0 E1	2
Silver	E0 E1 E2 E3	2
Gold	E0 E1 E2 E3 E4 E5 E6 E7	2
Decimal8	E0 E1 E2 E3	2
Decimal16	E0 E1 E2 E3	2

Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable