narrowus

From Mill Computing Wiki
Revision as of 06:58, 2 October 2014 by Shookie (Talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search
realizing  exu stream  exu block  compute phase   operation   in the unsigned integer value domain   using saturating overflow behavior  

native on: all

narrow scalar to half width

narrowus(u v) → u r0

operands: like Narrow [xx:½x]


Core In Slots Latencies
Tin E0 2
Copper E0 E1 2
Silver E0 E1 E2 E3 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2
Decimal8 E0 E1 E2 E3 2
Decimal16 E0 E1 E2 E3 2

narrowus(u v1, u v2) → u r0

operands: like Narrowv [XX:½x]


Core In Slots Latencies
Tin E0 2
Copper E0 E1 2
Silver E0 E1 E2 E3 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2
Decimal8 E0 E1 E2 E3 2
Decimal16 E0 E1 E2 E3 2
Retrieved from "http://millcomputing.com/w/index.php?title=Instruction_Set/narrowus&oldid=768"