divRems
From Mill Computing Wiki
realizing exu stream exu block compute phase operation in the signed integer value domain that produces condition codes
native on: none
Signed integer division for quotient and remainder.
divRems(s x, s y) → s r0, s r1
operands: like DivRem [xx:xx]
divRems(s x, imm y) → s r0, s r1
operands: like DivRem [xx:xx]