Difference between revisions of "Instruction Set/mulsfwz"

Latest revision as of 13:58, 23 February 2021

native on: all

Signed Fixed Point multiply. Rounds towards zero. Widening.

mulsfwz(sf x, sf y, bit dot) → sf r₀

operands: like Identity [xx:x]

@@ Line 16: / Line 16: @@
 ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 |-
-| [[Cores/Tin/Encoding#mulsfwz|Tin]] || E0 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+| [[Cores/Tin/Encoding#mulsfwz|Tin]] || E0 ||
 |-
-| [[Cores/Copper/Encoding#mulsfwz|Copper]] || E0 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+| [[Cores/Copper/Encoding#mulsfwz|Copper]] || E0 ||
 |-
-| [[Cores/Silver/Encoding#mulsfwz|Silver]] || E0 E1 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+| [[Cores/Silver/Encoding#mulsfwz|Silver]] || E0 E1 ||
 |-
-| [[Cores/Gold/Encoding#mulsfwz|Gold]] || E0 E1 E2 E3 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+| [[Cores/Gold/Encoding#mulsfwz|Gold]] || E0 ||
-|-
-| [[Cores/Decimal8/Encoding#mulsfwz|Decimal8]] || E0 E1 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
-|-
-| [[Cores/Decimal16/Encoding#mulsfwz|Decimal16]] || E0 E1 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
 |}
 [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]