Difference between revisions of "Instruction Set/neqd"

From Mill Computing Wiki
Jump to: navigation, search
m (Protected "Instruction Set/neqd": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite)))
(No difference)

Revision as of 01:33, 3 January 2015

realizing  exu stream  exu block  compute phase   operation   in the decimal floating point value domain  

native on: Decimal8 Decimal16

Decimal float inequality comparison. When one of the operands is a NaN, a floating point invalid NaR is produced as the result.

related operations: neqdx

neqd(d x, d y) → d r0

operands: like Addd [dd:d]


Core In Slots Latencies
Decimal8 E0 E1 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
Decimal16 E0 E1 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

Retrieved from "http://millcomputing.com/w/index.php?title=Instruction_Set/neqd&oldid=3066"