Difference between revisions of "Instruction Set/merge"

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bitwise merge
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Bitwise merge.
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It works like a multiplex: the bits in the mask operand decide whether the corresponding bit of the result is taken from op0 or op1.<br />
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Or explained differently: it does what [[Instruction_Set/pick|pick]] does on the operand level on the bit level.
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<code style="font-size:130%"><b style="color:#050">merge</b>(<span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">mask</span>, <span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">bits0</span>, <span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops  
 
<code style="font-size:130%"><b style="color:#050">merge</b>(<span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">mask</span>, <span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops window">bits0</span>, <span style="color:#009">[[Domains#u|u]]</span> <span title="belt operand from ops  

Revision as of 18:50, 20 December 2014

realizing  exu stream  exu block  compute phase   operation   in the logical value domain  

native on: all

Bitwise merge.

It works like a multiplex: the bits in the mask operand decide whether the corresponding bit of the result is taken from op0 or op1.
Or explained differently: it does what pick does on the operand level on the bit level.


merge(u mask, u bits0, u bits1) → op r0

operands: like Identity [xx:x]


encoding: merge(op op0) , exuArgs(op arg0, op arg1)

Core In Slots Latencies
Tin E0 1
Copper E0 E1 1
Silver E0 E1 E2 E3 1
Gold E0 E1 E2 E3 E4 E5 E6 E7 1
Decimal8 E0 E1 E2 E3 1
Decimal16 E0 E1 E2 E3 1


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