Difference between revisions of "Instruction Set/divRemu"
From Mill Computing Wiki
Line 17: | Line 17: | ||
</div> | </div> | ||
<br /> | <br /> | ||
+ | |||
+ | |||
+ | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Revision as of 02:37, 16 December 2014
realizing exu stream exu block compute phase operation in the unsigned integer value domain that produces condition codes
native on: none
Unsigned integer division for quotient and remainder.
divRemu(u x, u y) → u r0, u r1
operands: like DivRem [xx:xx]
divRemu(u x, imm y) → u r0, u r1
operands: like DivRem [xx:xx]
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable