Difference between revisions of "Instruction Set/all"

From Mill Computing Wiki
Jump to: navigation, search
(Created page with "{{DISPLAYTITLE:all}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream  exu block&...")
 
Line 4:Line 4:
 
</div>
 
</div>
  
vector AND reduction
+
Returns true if the lowest bit in all vector elements is set.
 +
 
 
----
 
----
 
<code style="font-size:130%"><b style="color:#050">all</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">v</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">all</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">v</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>

Revision as of 18:47, 26 November 2014

realizing  exu stream  exu block  compute phase   operation   in the logical value domain  

native on: all

Returns true if the lowest bit in all vector elements is set.


all(op v) → op r0

operands: like Leftv XX:i


Core In Slots Latencies
Tin E0 1
Copper E0 E1 1
Silver E0 E1 E2 E3 1
Gold E0 E1 E2 E3 E4 E5 E6 E7 1
Decimal8 E0 E1 E2 E3 1
Decimal16 E0 E1 E2 E3 1