Difference between revisions of "Instruction Set/vec"

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(Created page with "{{DISPLAYTITLE:vec}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream  exu block&...")
 
 
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{{DISPLAYTITLE:vec}}
 
{{DISPLAYTITLE:vec}}
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>
  
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vector constructor
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Create a new vector from the scalar operand list.
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<b>related operations:</b> [[Instruction_Set/alternate|alternate]], [[Instruction_Set/shuffle|shuffle]], [[Instruction_Set/inject|inject]], [[Instruction_Set/extract|extract]]
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----
 
----
 
<code style="font-size:130%"><b style="color:#050">vec</b>(<span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more vec arguments">args</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">vec</b>(<span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more vec arguments">args</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
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| [[Cores/Tin/Encoding#1107|Tin]] || E0 || 1
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| [[Cores/Tin/Encoding#vec|Tin]] || E0 ||  
 
|-
 
|-
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| [[Cores/Copper/Encoding#1107|Copper]] || E0 E1 || 1
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| [[Cores/Copper/Encoding#vec|Copper]] || E0 ||  
 
|-
 
|-
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| [[Cores/Silver/Encoding#1107|Silver]] || E0 E1 E2 E3 || 1
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| [[Cores/Silver/Encoding#vec|Silver]] || E0 E1 E2 E3 ||  
 
|-
 
|-
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| [[Cores/Gold/Encoding#1107|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 1
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| [[Cores/Gold/Encoding#vec|Gold]] || E0 ||  
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|-
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| [[Cores/Decimal8/Encoding#1107|Decimal8]] || E0 E1 E2 E3 || 1
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−
|-
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| [[Cores/Decimal16/Encoding#1107|Decimal16]] || E0 E1 E2 E3 || 1
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|}
 
|}
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[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 13:58, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the logical value domain  

native on: all

Create a new vector from the scalar operand list.

related operations: alternate, shuffle, inject, extract

vec(ops args) → op r0

operands: like Splat xx:X


encoding: vec(op op0) , vec(op op0, op op1)

Core In Slots Latencies
Tin E0
Copper E0
Silver E0 E1 E2 E3
Gold E0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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