Difference between revisions of "Instruction Set/incsw2pre"
From Mill Computing Wiki
(Created page with "{{DISPLAYTITLE:incsw2pre}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">speculable exu stream Decode|exu b...") | m (Protected "Instruction Set/incsw2pre": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) |
(No difference) |
Latest revision as of 13:58, 23 February 2021
speculable exu stream exu block compute phase operation in the signed integer value domain using widening overflow behavior that produces condition codes
native on: all
increment and compare with second argument
incsw2pre(s op0, s op1) → s r0, s r1
operands: like Wideningv XX:2X2X
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | |
Copper | E0 | |
Silver | E0 E1 E2 E3 | |
Gold | E0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable