Difference between revisions of "Cores/Silver"

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{{DISPLAYTITLE:Silver Core}}
 
{{DISPLAYTITLE:Silver Core}}
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<b>[[Cores]]:</b> [[Cores/Tin|Tin]]&nbsp;[[Cores/Copper|Copper]]&nbsp;[[Cores/Silver|Silver]]&nbsp;[[Cores/Gold|Gold]]&nbsp;[[Cores/Decimal8|Decimal8]]&nbsp;[[Cores/Decimal16|Decimal16]]&nbsp;
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<b>[[Cores]]:</b> [[Cores/Tin|Tin]]&nbsp;[[Cores/Copper|Copper]]&nbsp;[[Cores/Silver|Silver]]&nbsp;[[Cores/Gold|Gold]]&nbsp;
  
 
The Silver core offers a good amount of parallelism and also has native floating point arithmetic. It could be in a normal desktop or laptop computer or a mid range server with a more computation heavy workload.
 
The Silver core offers a good amount of parallelism and also has native floating point arithmetic. It could be in a normal desktop or laptop computer or a mid range server with a more computation heavy workload.
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<b>[[Belt]]</b>: 16&nbsp;&nbsp;<b>[[Decode#Morsel|Morsel]]</b>: 4bit&nbsp;&nbsp;<b>[[Operands|Scalar Width]]</b>: 64bit&nbsp;&nbsp;<b>[[Operands|Operand Maximum Size]]</b>: 16B&nbsp;&nbsp;
 
<b>[[Belt]]</b>: 16&nbsp;&nbsp;<b>[[Decode#Morsel|Morsel]]</b>: 4bit&nbsp;&nbsp;<b>[[Operands|Scalar Width]]</b>: 64bit&nbsp;&nbsp;<b>[[Operands|Operand Maximum Size]]</b>: 16B&nbsp;&nbsp;
  
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<b>[[Pipeline]]s</b>: 25&nbsp;&nbsp;<b>[[Retire Station]]s</b>: 16&nbsp;&nbsp;<b>[[Scratchpad]]</b>: 256B&nbsp;&nbsp;
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<b>[[Pipeline]]s</b>: 34&nbsp;&nbsp;<b>[[Retire Station]]s</b>: 16&nbsp;&nbsp;<b>[[Scratchpad]]</b>: 8192B&nbsp;&nbsp;
  
 
<b>[[Spiller|Spill Buffers]]</b>: 16&nbsp;&nbsp;<b>[[Spiller|Spiller Stack Size]]</b>: 256MB&nbsp;&nbsp;
 
<b>[[Spiller|Spill Buffers]]</b>: 16&nbsp;&nbsp;<b>[[Spiller|Spiller Stack Size]]</b>: 256MB&nbsp;&nbsp;
  
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<b>[[Memory#Instruction_Cache|iCache Line]]</b>: 32B&nbsp;&nbsp;
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<b>[[Memory#Instruction_Cache|iCache Line]]</b>: NoneB&nbsp;&nbsp;
  
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<b>6 reader slots</b>, 10bits wide&nbsp;&nbsp;&nbsp;<b>5 writer slots</b>, 7bits wide&nbsp;&nbsp;&nbsp;<b>2 pick slots</b>, 13bits wide&nbsp;&nbsp;&nbsp;
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<b>4 reader slots</b>, 19bits wide&nbsp;&nbsp;&nbsp;<b>5 writer slots</b>, 23bits wide&nbsp;&nbsp;&nbsp;<b>2 pick slots</b>, 14bits wide&nbsp;&nbsp;&nbsp;
  
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<b>exu slot 0</b>, 20bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#bfpmas|bfpmas]]&nbsp;[[Functional Unit#count|count]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;[[Functional Unit#nope|nope]]&nbsp;[[Functional Unit#shift|shift]]&nbsp;[[Functional Unit#shuffle|shuffle]]&nbsp;
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<b>exu slot 0</b>, 21bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpd|bfpd]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#count|count]]&nbsp;[[Functional Unit#div|div]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;[[Functional Unit#NaR|NaR]]&nbsp;[[Functional Unit#nope|nope]]&nbsp;[[Functional Unit#shift|shift]]&nbsp;[[Functional Unit#shuffle|shuffle]]&nbsp;
  
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<b>exu slot 1</b>, 20bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;[[Functional Unit#shift|shift]]&nbsp;
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<b>exu slot 1</b>, 21bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;[[Functional Unit#shift|shift]]&nbsp;
  
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<b>exu slot 2</b>, 16bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
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<b>exu slot 2</b>, 18bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
  
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<b>exu slot 3</b>, 16bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
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<b>exu slot 3</b>, 18bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
  
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<b>flow slot 0</b>, 15bits wide, with functional units: [[Functional Unit#cache|cache]]&nbsp;[[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
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<b>flow slot 0</b>, 20bits wide, with functional units: [[Functional Unit#cache|cache]]&nbsp;[[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
  
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<b>flow slot 1</b>, 15bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;
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<b>flow slot 1</b>, 20bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
  
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<b>flow slot 2</b>, 15bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;
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<b>flow slot 2</b>, 20bits wide, with functional units: [[Functional Unit#boot|boot]]&nbsp;[[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
  
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<b>flow slot 3</b>, 13bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;
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<b>flow slot 3</b>, 8bits wide, with functional units: [[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
  
  
  
 
[[Cores/Silver/Encoding|Operation Encoding]]
 
[[Cores/Silver/Encoding|Operation Encoding]]

Latest revision as of 14:15, 23 February 2021

Cores: Tin Copper Silver Gold 

The Silver core offers a good amount of parallelism and also has native floating point arithmetic. It could be in a normal desktop or laptop computer or a mid range server with a more computation heavy workload.


Belt: 16  Morsel: 4bit  Scalar Width: 64bit  Operand Maximum Size: 16B  

Pipelines: 34  Retire Stations: 16  Scratchpad: 8192B  

Spill Buffers: 16  Spiller Stack Size: 256MB  

iCache Line: NoneB  

4 reader slots, 19bits wide   5 writer slots, 23bits wide   2 pick slots, 14bits wide   

exu slot 0, 21bits wide, with functional units: alu bfp bfpd bfpm count div mul NaR nope shift shuffle 

exu slot 1, 21bits wide, with functional units: alu bfp bfpm exuArgs mul shift 

exu slot 2, 18bits wide, with functional units: alu exuArgs 

exu slot 3, 18bits wide, with functional units: alu exuArgs 

flow slot 0, 20bits wide, with functional units: cache con conform control ls nopf 

flow slot 1, 20bits wide, with functional units: con conform control flowArgs ls misc nopf 

flow slot 2, 20bits wide, with functional units: boot con conform control flowArgs ls misc nopf 

flow slot 3, 8bits wide, with functional units: flowArgs nopf 


Operation Encoding

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