Difference between revisions of "Instruction Set/lssd"
From Mill Computing Wiki
Line 1: | Line 1: | ||
{{DISPLAYTITLE:lssd}} | {{DISPLAYTITLE:lssd}} | ||
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the decimal floating point value domain]] <br /> | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the decimal floating point value domain]] <br /> | ||
− | '''native on:''' [[ | + | '''native on:''' [[Assembly|none]]<br /> |
</div> | </div> | ||
Line 14: | Line 14: | ||
</div> | </div> | ||
<br /> | <br /> | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Latest revision as of 13:57, 23 February 2021
speculable exu stream exu block compute phase operation in the decimal floating point value domain
native on: none
Decimal float lesser than comparison. When one of the operands is a NaN, a floating point invalid NaR is produced as the result.
related operations: lssdx
operands: like Addd [dd:d]
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable