Difference between revisions of "Instruction Set/neqp"

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{{DISPLAYTITLE:neqp}}
 
{{DISPLAYTITLE:neqp}}
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointers value domain]]&nbsp;&nbsp;<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointer value domain]]&nbsp;&nbsp;<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
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| [[Cores/Tin/Encoding#neqp|Tin]] || E0 || 2
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| [[Cores/Tin/Encoding#neqp|Tin]] || E0 ||  
 
|-
 
|-
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| [[Cores/Copper/Encoding#neqp|Copper]] || E0 E1 || 2
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| [[Cores/Copper/Encoding#neqp|Copper]] || E0 ||  
 
|-
 
|-
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| [[Cores/Silver/Encoding#neqp|Silver]] || E0 E1 E2 E3 || 2
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| [[Cores/Silver/Encoding#neqp|Silver]] || E0 E1 E2 E3 ||  
 
|-
 
|-
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| [[Cores/Gold/Encoding#neqp|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 2
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| [[Cores/Gold/Encoding#neqp|Gold]] || E0 ||  
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|-
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| [[Cores/Decimal8/Encoding#neqp|Decimal8]] || E0 E1 E2 E3 || 2
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|-
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| [[Cores/Decimal16/Encoding#neqp|Decimal16]] || E0 E1 E2 E3 || 2
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|}
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----
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<code style="font-size:130%"><b style="color:#050">neqp</b>([[Condition_Code|<span style="color:#666">conditioncode</span>]]) &#8594; [[Domains#p|p]] r<sub>0</sub></code>
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeEqlp|like Eqlp [pp:p]]]
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</div>
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Gets the inequality condition code of the ganged operation and puts it on the belt.
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<b>related operations:</b> [[Instruction_Set/eqlp|eqlp]], [[Instruction_Set/carry|carry]], [[Instruction_Set/overflow|overflow]], [[Instruction_Set/fault|fault]]
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<br />
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'''alternate encoding:''' [[Encoding#Skinny|skinny]]
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{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
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|-
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| [[Cores/Tin/Encoding#neqp|Tin]] || e0 || 2
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|-
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| [[Cores/Copper/Encoding#neqp|Copper]] || e0 || 2
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|-
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| [[Cores/Silver/Encoding#neqp|Silver]] || e0 || 2
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|-
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| [[Cores/Gold/Encoding#neqp|Gold]] || e0 || 2
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|-
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| [[Cores/Decimal8/Encoding#neqp|Decimal8]] || e0 || 2
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|-
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| [[Cores/Decimal16/Encoding#neqp|Decimal16]] || e0 || 2
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|}
 
|}
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:09, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the pointer value domain  

native on: all

Pointer inequality. The highest 3 bits of pointers are reserved for user purposes like garbage collection, and as such are ignored in pointer comparisons.

neqp(p x, p y) → p r0

operands: like Eqlp [pp:p]


Core In Slots Latencies
Tin E0
Copper E0
Silver E0 E1 E2 E3
Gold E0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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