Difference between revisions of "Instruction Set/merge"
From Mill Computing Wiki
| (2 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
{{DISPLAYTITLE:merge}} | {{DISPLAYTITLE:merge}} | ||
| − | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the logical value domain]] <br /> |
'''native on:''' [[Cores|all]]<br /> | '''native on:''' [[Cores|all]]<br /> | ||
</div> | </div> | ||
| Line 8: | Line 8: | ||
It works like a multiplex: the bits in the mask operand decide whether the corresponding bit of the result is taken from op0 or op1.<br /> | It works like a multiplex: the bits in the mask operand decide whether the corresponding bit of the result is taken from op0 or op1.<br /> | ||
Or explained differently: it does what [[Instruction_Set/pick|pick]] does on the operand level on the bit level. | Or explained differently: it does what [[Instruction_Set/pick|pick]] does on the operand level on the bit level. | ||
| + | |||
| + | ---- | ||
| + | <code style="font-size:130%"><b style="color:#050">merge</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>) → [[Domains#op|op]] r<sub>0</sub></code> | ||
| + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]] | ||
| + | </div> | ||
| + | <br /> | ||
| + | |||
| + | {| class="mw-collapsible mw-collapsed wikitable" data-expandtext="▸" data-collapsetext="▾" | ||
| + | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
| + | |- | ||
| + | | [[Cores/Tin/Encoding#merge|Tin]] || E0 || 1 | ||
| + | |- | ||
| + | | [[Cores/Copper/Encoding#merge|Copper]] || E0 || 1 | ||
| + | |- | ||
| + | | [[Cores/Silver/Encoding#merge|Silver]] || E0 E1 E2 E3 || 1 | ||
| + | |- | ||
| + | | [[Cores/Gold/Encoding#merge|Gold]] || E0 || 1 | ||
| + | |} | ||
---- | ---- | ||
| Line 25: | Line 43: | ||
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
| − | | [[Cores/Tin/Encoding#merge|Tin]] || E0 || | + | | [[Cores/Tin/Encoding#merge|Tin]] || E0 || |
| − | + | ||
| − | + | ||
| − | + | ||
| − | + | ||
|- | |- | ||
| − | | [[Cores/ | + | | [[Cores/Copper/Encoding#merge|Copper]] || E0 || |
|- | |- | ||
| − | | [[Cores/ | + | | [[Cores/Silver/Encoding#merge|Silver]] || E0 E1 E2 E3 || |
|- | |- | ||
| − | | [[Cores/ | + | | [[Cores/Gold/Encoding#merge|Gold]] || E0 || |
|} | |} | ||
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | ||
Latest revision as of 13:25, 23 February 2021
Bitwise merge.
It works like a multiplex: the bits in the mask operand decide whether the corresponding bit of the result is taken from op0 or op1.
Or explained differently: it does what pick does on the operand level on the bit level.
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | 1 |
| Copper | E0 | 1 |
| Silver | E0 E1 E2 E3 | 1 |
| Gold | E0 | 1 |
merge(u mask, u bits0, u bits1) → op r0
operands: like Identity [xx:x]
encoding:
merge(op op0)
,
exuArgs(op arg0, op arg1)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | |
| Copper | E0 | |
| Silver | E0 E1 E2 E3 | |
| Gold | E0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
