Difference between revisions of "Instruction Set/eqld"

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{{DISPLAYTITLE:eqld}}
 
{{DISPLAYTITLE:eqld}}
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp;<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp;<br />
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'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
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'''native on:''' [[Assembly|none]]<br />
 
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equal
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Decimal float equality comparison.
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When one of the operands is a <abbr title="Not a Number">NaN</abbr>, a floating point invalid [[NaR]] is produced as the result.
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<b>related operations:</b> [[Instruction_Set/eqldx|eqldx]]                                         
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<code style="font-size:130%"><b style="color:#050">eqld</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">eqld</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
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{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
 
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
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| [[Cores/Decimal8/Encoding#eqld|Decimal8]] || E0 E1 || d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
 
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| [[Cores/Decimal16/Encoding#eqld|Decimal16]] || E0 E1 || d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
 
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|}
 
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 13:57, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the decimal floating point value domain  

native on: none

Decimal float equality comparison. When one of the operands is a NaN, a floating point invalid NaR is produced as the result.

related operations: eqldx

eqld(d x, d y) → d r0

operands: like Addd [dd:d]



Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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