Difference between revisions of "Cores/Gold"

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{{DISPLAYTITLE:Gold Core}}
 
{{DISPLAYTITLE:Gold Core}}
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<b>[[Cores]]:</b> [[Cores/Tin|Tin]]&nbsp;[[Cores/Copper|Copper]]&nbsp;[[Cores/Silver|Silver]]&nbsp;[[Cores/Gold|Gold]]&nbsp;[[Cores/Decimal8|Decimal8]]&nbsp;[[Cores/Decimal16|Decimal16]]&nbsp;
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<b>[[Cores]]:</b> [[Cores/Tin|Tin]]&nbsp;[[Cores/Copper|Copper]]&nbsp;[[Cores/Silver|Silver]]&nbsp;[[Cores/Gold|Gold]]&nbsp;
  
 
The Gold core was conceived as the high end product, the reasonably most powerful configuration. It offers massive parallelism for both integer and floating point workloads, even for wide 128bit floating point. It can serve in a big compute server for simulations, or in a media creation workstation.
 
The Gold core was conceived as the high end product, the reasonably most powerful configuration. It offers massive parallelism for both integer and floating point workloads, even for wide 128bit floating point. It can serve in a big compute server for simulations, or in a media creation workstation.
  
  
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<b>[[Belt]]</b>: 32&nbsp;&nbsp;<b>[[Decode#Morsel|Morsel]]</b>: 5bit&nbsp;&nbsp;<b>[[Operands|Scalar Width]]</b>: 128bit&nbsp;&nbsp;<b>[[Operands|Operand Maximum Size]]</b>: 32B&nbsp;&nbsp;
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<b>[[Belt]]</b>: 32&nbsp;&nbsp;<b>[[Decode#Morsel|Morsel]]</b>: 5bit&nbsp;&nbsp;<b>[[Operands|Scalar Width]]</b>: 128bit&nbsp;&nbsp;<b>[[Operands|Operand Maximum Size]]</b>: 16B&nbsp;&nbsp;
  
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<b>[[Pipeline]]s</b>: 37&nbsp;&nbsp;<b>[[Retire Station]]s</b>: 16&nbsp;&nbsp;<b>[[Scratchpad]]</b>: 512B&nbsp;&nbsp;
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<b>[[Pipeline]]s</b>: 19&nbsp;&nbsp;<b>[[Retire Station]]s</b>: 16&nbsp;&nbsp;<b>[[Scratchpad]]</b>: 16384B&nbsp;&nbsp;
  
 
<b>[[Spiller|Spill Buffers]]</b>: 16&nbsp;&nbsp;<b>[[Spiller|Spiller Stack Size]]</b>: 256MB&nbsp;&nbsp;
 
<b>[[Spiller|Spill Buffers]]</b>: 16&nbsp;&nbsp;<b>[[Spiller|Spiller Stack Size]]</b>: 256MB&nbsp;&nbsp;
  
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<b>[[Memory#Instruction_Cache|iCache Line]]</b>: 64B&nbsp;&nbsp;
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<b>[[Memory#Instruction_Cache|iCache Line]]</b>: NoneB&nbsp;&nbsp;
  
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<b>8 reader slots</b>, 11bits wide&nbsp;&nbsp;&nbsp;<b>5 writer slots</b>, 8bits wide&nbsp;&nbsp;&nbsp;<b>4 pick slots</b>, 16bits wide&nbsp;&nbsp;&nbsp;
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<b>2 reader slots</b>, 17bits wide&nbsp;&nbsp;&nbsp;<b>2 writer slots</b>, 20bits wide&nbsp;&nbsp;&nbsp;<b>1 pick slots</b>, 11bits wide&nbsp;&nbsp;&nbsp;
  
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<b>exu slot 0</b>, 23bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#bfpmas|bfpmas]]&nbsp;[[Functional Unit#count|count]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;[[Functional Unit#nope|nope]]&nbsp;[[Functional Unit#shift|shift]]&nbsp;[[Functional Unit#shuffle|shuffle]]&nbsp;
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<b>exu slot 0</b>, 19bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#count|count]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;[[Functional Unit#NaR|NaR]]&nbsp;[[Functional Unit#nope|nope]]&nbsp;[[Functional Unit#shift|shift]]&nbsp;[[Functional Unit#shuffle|shuffle]]&nbsp;
  
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<b>exu slot 1</b>, 23bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;[[Functional Unit#nope|nope]]&nbsp;[[Functional Unit#shift|shift]]&nbsp;
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<b>exu slot 1</b>, 7bits wide, with functional units: [[Functional Unit#cc|cc]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
  
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<b>exu slot 2</b>, 23bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#bfpmas|bfpmas]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;
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<b>flow slot 0</b>, 18bits wide, with functional units: [[Functional Unit#boot|boot]]&nbsp;[[Functional Unit#cache|cache]]&nbsp;[[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
  
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<b>exu slot 3</b>, 23bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#bfp|bfp]]&nbsp;[[Functional Unit#bfpm|bfpm]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;[[Functional Unit#mul|mul]]&nbsp;
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<b>flow slot 1</b>, 8bits wide, with functional units: [[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
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<b>exu slot 4</b>, 19bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
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<b>exu slot 5</b>, 19bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
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<b>exu slot 6</b>, 19bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
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<b>exu slot 7</b>, 19bits wide, with functional units: [[Functional Unit#alu|alu]]&nbsp;[[Functional Unit#exuArgs|exuArgs]]&nbsp;
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<b>flow slot 0</b>, 17bits wide, with functional units: [[Functional Unit#cache|cache]]&nbsp;[[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;[[Functional Unit#nopf|nopf]]&nbsp;
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<b>flow slot 1</b>, 17bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;[[Functional Unit#misc|misc]]&nbsp;
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<b>flow slot 2</b>, 17bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;
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<b>flow slot 3</b>, 17bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#conform|conform]]&nbsp;[[Functional Unit#control|control]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;
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<b>flow slot 4</b>, 16bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;
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<b>flow slot 5</b>, 16bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;
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<b>flow slot 6</b>, 16bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;
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<b>flow slot 7</b>, 16bits wide, with functional units: [[Functional Unit#con|con]]&nbsp;[[Functional Unit#flowArgs|flowArgs]]&nbsp;[[Functional Unit#ls|ls]]&nbsp;[[Functional Unit#lsb|lsb]]&nbsp;
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[[Cores/Gold/Encoding|Operation Encoding]]
 
[[Cores/Gold/Encoding|Operation Encoding]]

Latest revision as of 14:14, 23 February 2021

Cores: Tin Copper Silver Gold 

The Gold core was conceived as the high end product, the reasonably most powerful configuration. It offers massive parallelism for both integer and floating point workloads, even for wide 128bit floating point. It can serve in a big compute server for simulations, or in a media creation workstation.


Belt: 32  Morsel: 5bit  Scalar Width: 128bit  Operand Maximum Size: 16B  

Pipelines: 19  Retire Stations: 16  Scratchpad: 16384B  

Spill Buffers: 16  Spiller Stack Size: 256MB  

iCache Line: NoneB  

2 reader slots, 17bits wide   2 writer slots, 20bits wide   1 pick slots, 11bits wide   

exu slot 0, 19bits wide, with functional units: alu count mul NaR nope shift shuffle 

exu slot 1, 7bits wide, with functional units: cc exuArgs 

flow slot 0, 18bits wide, with functional units: boot cache con conform control ls misc nopf 

flow slot 1, 8bits wide, with functional units: flowArgs nopf 


Operation Encoding

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