Difference between revisions of "Instruction Set/store"
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The addressing modes are the same as for loads. The general formula for computing addresses is | The addressing modes are the same as for loads. The general formula for computing addresses is | ||
<code>base+offset+(scale*index)</code>.<br /> | <code>base+offset+(scale*index)</code>.<br /> | ||
− | Base can come from a number of special [[ | + | Base can come from a number of special [[Registers]] or the belt. Offset is always an inline constant. Those two are always present, although a zero offset doesn't take any space at all.<br /> |
Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt. | Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt. | ||
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---- | ---- | ||
− | <code style="font-size:130%"><b style="color:#050">store</b>(<span style="color:#009">[[ | + | <code style="font-size:130%"><b style="color:#050">store</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">base0</span>, <span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">op0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>)</code> |
− | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]] | |
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands# | + | |
</div> | </div> | ||
<br /> | <br /> | ||
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| [[Cores/Tin/Encoding#store|Tin]] || F0 || 1 | | [[Cores/Tin/Encoding#store|Tin]] || F0 || 1 | ||
|- | |- | ||
− | | [[Cores/Copper/Encoding#store|Copper]] || F0 | + | | [[Cores/Copper/Encoding#store|Copper]] || F0 || 1 |
|- | |- | ||
− | | [[Cores/Silver/Encoding#store|Silver]] || F0 F1 F2 | + | | [[Cores/Silver/Encoding#store|Silver]] || F0 F1 F2 || 1 |
|- | |- | ||
− | | [[Cores/Gold/Encoding#store|Gold]] || F0 | + | | [[Cores/Gold/Encoding#store|Gold]] || F0 || 1 |
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|} | |} | ||
---- | ---- | ||
− | <code style="font-size:130%"><b style="color:#050">store</b>(<span style="color:#009">[[ | + | <code style="font-size:130%"><b style="color:#050">store</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#memAttr|memAttr]]</span> <span title="special load/store |
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands# | + | behaviors">memAttr0</span></i>)</code> |
+ | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]] | ||
</div> | </div> | ||
<br /> | <br /> | ||
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| [[Cores/Tin/Encoding#store|Tin]] || F0 || 1 | | [[Cores/Tin/Encoding#store|Tin]] || F0 || 1 | ||
|- | |- | ||
− | | [[Cores/Copper/Encoding#store|Copper]] || F0 | + | | [[Cores/Copper/Encoding#store|Copper]] || F0 || 1 |
|- | |- | ||
− | | [[Cores/Silver/Encoding#store|Silver]] || F0 F1 F2 | + | | [[Cores/Silver/Encoding#store|Silver]] || F0 F1 F2 || 1 |
|- | |- | ||
− | | [[Cores/Gold/Encoding#store|Gold]] || F0 | + | | [[Cores/Gold/Encoding#store|Gold]] || F0 || 1 |
− | + | ||
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|} | |} | ||
---- | ---- | ||
− | <code style="font-size:130%"><b style="color:#050">store</b>(<span style="color:#009">[[Domains# | + | <code style="font-size:130%"><b style="color:#050">store</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="late-evaluated operand from belt">op0</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op1</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">off0</span></i>)</code> |
− | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeStore|like Store px:]] | |
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands# | + | |
</div> | </div> | ||
<br /> | <br /> | ||
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| [[Cores/Tin/Encoding#store|Tin]] || F0 || 1 | | [[Cores/Tin/Encoding#store|Tin]] || F0 || 1 | ||
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− | | [[Cores/Copper/Encoding#store|Copper]] || F0 | + | | [[Cores/Copper/Encoding#store|Copper]] || F0 || 1 |
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|- | |- | ||
− | | [[Cores/ | + | | [[Cores/Silver/Encoding#store|Silver]] || F0 F1 F2 || 1 |
|- | |- | ||
− | | [[Cores/ | + | | [[Cores/Gold/Encoding#store|Gold]] || F0 || 1 |
|} | |} | ||
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Latest revision as of 14:00, 23 February 2021
Take a value from the belt and store it to the computed address.
Stores always write into the top level data cache, i.e. they are only reflected in main memory after travelling down the cache hierarchy, unless other behavior is requested with special attributes.
The addressing modes are the same as for loads. The general formula for computing addresses is
base+offset+(scale*index)
.
Base can come from a number of special Registers or the belt. Offset is always an inline constant. Those two are always present, although a zero offset doesn't take any space at all.
Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt.
The width and scalarity of the value to store are determined from the metadata of the belt item that is getting stored. No need for any parameters or separate operations.
related operations: load, storef, stored
store(op base0, base op0, off off0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 1 |
Copper | F0 | 1 |
Silver | F0 F1 F2 | 1 |
Gold | F0 | 1 |
store(op op0, op op1, memAttr memAttr0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 1 |
Copper | F0 | 1 |
Silver | F0 F1 F2 | 1 |
Gold | F0 | 1 |
store(op op0, op op1, off off0)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 1 |
Copper | F0 | 1 |
Silver | F0 F1 F2 | 1 |
Gold | F0 | 1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable