Difference between revisions of "Instruction Set/eqlp"

From Mill Computing Wiki
Jump to: navigation, search
 
Line 1:Line 1:
 
{{DISPLAYTITLE:eqlp}}
 
{{DISPLAYTITLE:eqlp}}
−
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointers value domain]]&nbsp;&nbsp;<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the pointer value domain]]&nbsp;&nbsp;<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>
Line 16:Line 16:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#eqlp|Tin]] || E0 || 2
+
| [[Cores/Tin/Encoding#eqlp|Tin]] || E0 ||  
 
|-
 
|-
−
| [[Cores/Copper/Encoding#eqlp|Copper]] || E0 E1 || 2
+
| [[Cores/Copper/Encoding#eqlp|Copper]] || E0 ||  
 
|-
 
|-
−
| [[Cores/Silver/Encoding#eqlp|Silver]] || E0 E1 E2 E3 || 2
+
| [[Cores/Silver/Encoding#eqlp|Silver]] || E0 E1 E2 E3 ||  
 
|-
 
|-
−
| [[Cores/Gold/Encoding#eqlp|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 2
+
| [[Cores/Gold/Encoding#eqlp|Gold]] || E0 ||  
−
|-
+
−
| [[Cores/Decimal8/Encoding#eqlp|Decimal8]] || E0 E1 E2 E3 || 2
+
−
|-
+
−
| [[Cores/Decimal16/Encoding#eqlp|Decimal16]] || E0 E1 E2 E3 || 2
+
−
|}
+
−
 
+
−
----
+
−
<code style="font-size:130%"><b style="color:#050">eqlp</b>([[Condition_Code|<span style="color:#666">conditioncode</span>]]) &#8594; [[Domains#p|p]] r<sub>0</sub></code>
+
−
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeEqlp|like Eqlp [pp:p]]]
+
−
</div>
+
−
Gets the inequality condition code of the ganged operation and puts it on the belt.
+
−
 
+
−
<b>related operations:</b> [[Instruction_Set/neqp|neqp]], [[Instruction_Set/carry|carry]], [[Instruction_Set/overflow|overflow]], [[Instruction_Set/fault|fault]]
+
−
<br />
+
−
 
+
−
'''alternate encoding:''' [[Encoding#Skinny|skinny]]
+
−
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
+
−
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
+
−
|-
+
−
| [[Cores/Tin/Encoding#eqlp|Tin]] || e0 || 2
+
−
|-
+
−
| [[Cores/Copper/Encoding#eqlp|Copper]] || e0 || 2
+
−
|-
+
−
| [[Cores/Silver/Encoding#eqlp|Silver]] || e0 || 2
+
−
|-
+
−
| [[Cores/Gold/Encoding#eqlp|Gold]] || e0 || 2
+
−
|-
+
−
| [[Cores/Decimal8/Encoding#eqlp|Decimal8]] || e0 || 2
+
−
|-
+
−
| [[Cores/Decimal16/Encoding#eqlp|Decimal16]] || e0 || 2
+
 
|}
 
|}
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 13:24, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the pointer value domain  

native on: all

Pointer equality. The highest 3 bits of pointers are reserved for user purposes like garbage collection, and as such are ignored in pointer comparisons.

eqlp(p x, p y) → p r0

operands: like Eqlp [pp:p]


Core In Slots Latencies
Tin E0
Copper E0
Silver E0 E1 E2 E3
Gold E0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

Retrieved from "http://millcomputing.com/w/index.php?title=Instruction_Set/eqlp&oldid=4260"