Difference between revisions of "Instruction Set/addsx"
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m (Protected "Instruction Set/addsx": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |||
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{{DISPLAYTITLE:addsx}} | {{DISPLAYTITLE:addsx}} | ||
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the signed integer value domain]] [[Overflow|using excepting overflow behavior]] [[Condition Code|that produces condition codes]]<br /> |
'''aliases:''' addsxv <br /> | '''aliases:''' addsxv <br /> | ||
'''native on:''' [[Cores|all]]<br /> | '''native on:''' [[Cores|all]]<br /> |
Revision as of 09:28, 9 February 2015
speculable exu stream exu block compute phase operation in the signed integer value domain using excepting overflow behavior that produces condition codes
aliases: addsxv
native on: all
Excepting signed integer add. Overflow or underflow produces a NaR.
operands: like Identity [xx:x]
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | 2 |
Copper | E0 E1 | 2 |
Silver | E0 E1 E2 E3 | 2 |
Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 2 |
Decimal8 | E0 E1 E2 E3 | 2 |
Decimal16 | E0 E1 E2 E3 | 2 |
operands: like Identity [xx:x]
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | 2 |
Copper | E0 E1 | 2 |
Silver | E0 E1 E2 E3 | 2 |
Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 2 |
Decimal8 | E0 E1 E2 E3 | 2 |
Decimal16 | E0 E1 E2 E3 | 2 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable