Difference between revisions of "Instruction Set/gtr"

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(Created page with "{{DISPLAYTITLE:gtr}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream Decode|exuSkinny bl...")
 
 
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{{DISPLAYTITLE:gtr}}
 
{{DISPLAYTITLE:gtr}}
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exuSkinny block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exuSkinny block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp;<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>
  
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greater than
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Integer greater than comparison.
 +
All comparison operations produce 0 or 1 values of the operand width.
 +
 
 
----
 
----
 
<code style="font-size:130%"><b style="color:#050">gtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">gtr</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
Line 15:Line 17:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#1163|Tin]] || e1 || 1
+
| [[Cores/Tin/Encoding#gtr|Tin]] || e1 || 1
 
|-
 
|-
−
| [[Cores/Copper/Encoding#1163|Copper]] || e1 || 1
+
| [[Cores/Copper/Encoding#gtr|Copper]] || e1 || 1
 
|-
 
|-
−
| [[Cores/Silver/Encoding#1163|Silver]] || e1 || 1
+
| [[Cores/Silver/Encoding#gtr|Silver]] || e1 || 1
 
|-
 
|-
−
| [[Cores/Gold/Encoding#1163|Gold]] || e1 || 1
+
| [[Cores/Gold/Encoding#gtr|Gold]] || e1 || 1
 
|-
 
|-
−
| [[Cores/Decimal8/Encoding#1163|Decimal8]] || e1 || 1
+
| [[Cores/Decimal8/Encoding#gtr|Decimal8]] || e1 || 1
 
|-
 
|-
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| [[Cores/Decimal16/Encoding#1163|Decimal16]] || e1 || 1
+
| [[Cores/Decimal16/Encoding#gtr|Decimal16]] || e1 || 1
 
|}
 
|}
  
 
----
 
----
−
<code style="font-size:130%"><b style="color:#050">gtr</b>(<span style="color:#666">conditioncode</span>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
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<code style="font-size:130%"><b style="color:#050">gtr</b>([[Condition_Code|<span style="color:#666">conditioncode</span>]]) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]
 
</div>
 
</div>
 +
Gets the greater than condition code of the ganged operation and puts it on the belt.
 +
 +
<b>related operations:</b> [[Instruction_Set/eql|eql]], [[Instruction_Set/neq|neq]], [[Instruction_Set/geq|geq]], [[Instruction_Set/lss|lss]], [[Instruction_Set/leq|leq]], [[Instruction_Set/carry|carry]], [[Instruction_Set/overflow|overflow]], [[Instruction_Set/fault|fault]]
 
<br />
 
<br />
  
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#454|Tin]] || E0 E1 || 1
+
| [[Cores/Tin/Encoding#gtr|Tin]] || E0 E1 || 1
 
|-
 
|-
−
| [[Cores/Copper/Encoding#454|Copper]] || E0 E1 || 1
+
| [[Cores/Copper/Encoding#gtr|Copper]] || E0 E1 || 1
 
|-
 
|-
−
| [[Cores/Silver/Encoding#454|Silver]] || E0 E1 E2 E3 || 1
+
| [[Cores/Silver/Encoding#gtr|Silver]] || E0 E1 E2 E3 || 1
 
|-
 
|-
−
| [[Cores/Gold/Encoding#454|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 1
+
| [[Cores/Gold/Encoding#gtr|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 1
 
|-
 
|-
−
| [[Cores/Decimal8/Encoding#454|Decimal8]] || E0 E1 E2 E3 || 1
+
| [[Cores/Decimal8/Encoding#gtr|Decimal8]] || E0 E1 E2 E3 || 1
 
|-
 
|-
−
| [[Cores/Decimal16/Encoding#454|Decimal16]] || E0 E1 E2 E3 || 1
+
| [[Cores/Decimal16/Encoding#gtr|Decimal16]] || E0 E1 E2 E3 || 1
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 09:27, 9 February 2015

speculable  exu stream  exuSkinny block  compute phase   operation   in the logical value domain  

native on: all

Integer greater than comparison. All comparison operations produce 0 or 1 values of the operand width.

gtr(op x, op y) → op r0

operands: like Identity [xx:x]


alternate encoding: skinny

Core In Slots Latencies
Tin e1 1
Copper e1 1
Silver e1 1
Gold e1 1
Decimal8 e1 1
Decimal16 e1 1

gtr(conditioncode) → op r0

operands: like Identity [xx:x]

Gets the greater than condition code of the ganged operation and puts it on the belt.

related operations: eql, neq, geq, lss, leq, carry, overflow, fault

Core In Slots Latencies
Tin E0 E1 1
Copper E0 E1 1
Silver E0 E1 E2 E3 1
Gold E0 E1 E2 E3 E4 E5 E6 E7 1
Decimal8 E0 E1 E2 E3 1
Decimal16 E0 E1 E2 E3 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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