Difference between revisions of "Instruction Set/neqd"
From Mill Computing Wiki
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| − | + | Decimal float inequality comparison. | |
| + | When one of the operands is a <abbr title="Not a Number">NaN</abbr>, a floating point invalid [[NaR]] is produced as the result. | ||
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| + | <b>related operations:</b> [[Instruction_Set/neqdx|neqdx]] | ||
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---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">neqd</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#d|d]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">neqd</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#d|d]] r<sub>0</sub></code> | ||
Revision as of 17:09, 16 December 2014
Decimal float inequality comparison. When one of the operands is a NaN, a floating point invalid NaR is produced as the result.
related operations: neqdx
operands: like Addd [dd:d]
| Core | In Slots | Latencies |
|---|---|---|
| Decimal8 | E0 E1 | d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5 |
| Decimal16 | E0 E1 | d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
