Difference between revisions of "Instruction Set/lssdx"
From Mill Computing Wiki
| Line 4: | Line 4: | ||
</div> | </div> | ||
| − | + | Decimal float lesser than comparison. NaN-Aware. | |
| + | When one or both of the operands are a <abbr title="Not a Number">NaN</abbr>, the comparison is false. | ||
| + | |||
| + | <b>related operations:</b> [[Instruction_Set/lssd|lssd]] | ||
| + | |||
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">lssdx</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#d|d]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">lssdx</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#d|d]] r<sub>0</sub></code> | ||
Revision as of 17:08, 16 December 2014
Decimal float lesser than comparison. NaN-Aware. When one or both of the operands are a NaN, the comparison is false.
related operations: lssd
operands: like Addd [dd:d]
| Core | In Slots | Latencies |
|---|---|---|
| Decimal8 | E0 E1 | d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5 |
| Decimal16 | E0 E1 | d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
