Difference between revisions of "Instruction Set/lssd"

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less than
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Decimal float lesser than comparison.
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When one of the operands is a <abbr title="Not a Number">NaN</abbr>, a floating point invalid [[NaR]] is produced as the result.
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<b>related operations:</b> [[Instruction_Set/lssdx|lssdx]]                                         
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<code style="font-size:130%"><b style="color:#050">lssd</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">lssd</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>

Revision as of 17:07, 16 December 2014

realizing  exu stream  exu block  compute phase   operation   in the decimal floating point value domain  

native on: Decimal8 Decimal16

Decimal float lesser than comparison. When one of the operands is a NaN, a floating point invalid NaR is produced as the result.

related operations: lssdx


lssd(d x, d y) → d r0

operands: like Addd [dd:d]


Core In Slots Latencies
Decimal8 E0 E1 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
Decimal16 E0 E1 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5


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