Difference between revisions of "Instruction Set/shuffle"
From Mill Computing Wiki
(Created page with "{{DISPLAYTITLE:shuffle}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing exu stream Decode|exu bloc...") | |||
| Line 4: | Line 4: | ||
</div> | </div> | ||
| − | + | Create a new vector where the elements are the values of the first operand vector and their respective positions in the second operand vector. | |
| + | |||
| + | <b>related operations:</b> [[Instruction_Set/alternate|alternate]], [[Instruction_Set/vec|vec]], [[Instruction_Set/inject|inject]], [[Instruction_Set/extract|extract]] | ||
| + | |||
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">shuffle</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">vs</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">positions</span>) → [[Domains#op|op]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">shuffle</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">vs</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">positions</span>) → [[Domains#op|op]] r<sub>0</sub></code> | ||
| Line 14: | Line 17: | ||
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
| − | | [[Cores/Tin/Encoding# | + | | [[Cores/Tin/Encoding#shuffle|Tin]] || E0 || 1 |
|- | |- | ||
| − | | [[Cores/Copper/Encoding# | + | | [[Cores/Copper/Encoding#shuffle|Copper]] || E0 E1 || 1 |
|- | |- | ||
| − | | [[Cores/Silver/Encoding# | + | | [[Cores/Silver/Encoding#shuffle|Silver]] || E0 E1 E2 E3 || 1 |
|- | |- | ||
| − | | [[Cores/Gold/Encoding# | + | | [[Cores/Gold/Encoding#shuffle|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 1 |
|- | |- | ||
| − | | [[Cores/Decimal8/Encoding# | + | | [[Cores/Decimal8/Encoding#shuffle|Decimal8]] || E0 E1 E2 E3 || 1 |
|- | |- | ||
| − | | [[Cores/Decimal16/Encoding# | + | | [[Cores/Decimal16/Encoding#shuffle|Decimal16]] || E0 E1 E2 E3 || 1 |
|} | |} | ||
| + | |||
| + | |||
| + | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | ||
Revision as of 02:36, 16 December 2014
Create a new vector where the elements are the values of the first operand vector and their respective positions in the second operand vector.
related operations: alternate, vec, inject, extract
shuffle(op vs, op positions) → op r0
operands: like Shuffle [xn:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | 1 |
| Copper | E0 E1 | 1 |
| Silver | E0 E1 E2 E3 | 1 |
| Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 1 |
| Decimal8 | E0 E1 E2 E3 | 1 |
| Decimal16 | E0 E1 E2 E3 | 1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
