View source for Instruction Set/rsub

{{DISPLAYTITLE:rsub}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the logical value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
'''aliases:''' rsubs rsubu rsubs2 rsubu2 <br />
'''native on:''' [[Cores|all]]<br />
</div>

reverse subtraction
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<code style="font-size:130%"><b style="color:#050">rsub</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#imm|imm]]</span> <span title="small immediate constant of per-slot varying range">imm0</span></i>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeIdentity|like Identity [xx:x]]]
</div>
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{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
|-
| [[Cores/Tin/Encoding#rsub|Tin]] || E0 || 
|-
| [[Cores/Copper/Encoding#rsub|Copper]] || E0 || 
|-
| [[Cores/Silver/Encoding#rsub|Silver]] || E0 E1 E2 E3 || 
|-
| [[Cores/Gold/Encoding#rsub|Gold]] || E0 || 
|}


[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]