Mill Computing, Inc. Forums Announcements Events EECS Seminar on MIll

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  • Brian Delaney
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    #1497 |

    EECS Seminar on
    Mill Computing and the Mill Architecture

    Norges teknisk-naturvitenskapelige universitet (NTNU), Trondheim, Norway.

    21st October 2014 at 15:15h – 17:00 local-time in Room 454 of the IT-building

    The computer architecture and design research group (CARD) at NTNU together with EECS will host a guest lecture by Terje Mathisen on a new general purpose processor architecture called The Mill.

    “The Mill is a compatible family of general-purpose CPUs. The architecture is very unlike that of legacy designs, but can execute existing software without rewrite. Internally, the Mill is wide-issue, statically scheduled with an exposed pipeline, with a single-address-space memory model using virtual caching. It offers a 10x power/performance advantage over existing cores.”

    The lecture will be taped on video, so please be precise (meet before 15:15h)

    The lecture is part of the NTNU course TDT1 – Energy Efficient Multicore Computing and is open for all interested people. See map for how to find room 454 in the IT-building.

    Local host/contact person is Lasse Natvig.

    About the speaker: Terje Mathisen got his MSEE at NTH (NTNU) in 1981, he is currently employed by Evry where he spends most of his time troubleshooting networked applications. Since graduating he has worked on digital signal processing, voice and video decoding, crypto (optimizing one of the AES candidates), 3D graphics (Quake assembler optimization) and multi-core computing. He is also one of the NTP Hackers, with an interest in using GPS for precise time synchronization. He has been part of the Mill project since January 2014.

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