Mill Computing, Inc. › Forums › The Mill › Architecture › Instruction Encoding › Reply To: Instruction Encoding
Is the Mill ISA non-self-synchronizing? That is, is it possible that you could jump to memory address foo and get one valid stream of execution, but also be able to jump to address foo+1 and get an alternative but equally valid stream of execution? I imagine it works this way in the Mill, as it does with x86.