“@deepblue I agree with Ivan that there are things that are
quite different that require brand new infrastructure to
emulate the Mill correctly. For one thing, all the wide
ISAs emulated so far are not really in the mainstream
qemu support. Support for the most mainstream of them,
Itanium, was dropped back in 2017. All the existing
platforms also assume a rather classical register file,
not a belt with configurable size and so on. So yes,
this is going to be a lot of work in my opinion, not
a student’s work for”.
The fact you are referring to the “official” list of
supported of ISAs supported by QEMU opens the question
if you have actually ever worked directly with QEMU code.
Did you pick this up from the Wikipedia? Keep in mind
many projects used QEMU internally as a scaffold and
never released any information to the general public.
FWIW I modified QEMU to emulate a vector architecture
many years ago. It was a piece of cake. QEMU code is
quite modular — big and small blocks can be swapped
in and out in pretty straightforward fashion.