Mill Computing, Inc. › Forums › The Mill › Architecture › Memory › Reply To: Memory
January 3, 2014 at 11:16 pm
Post count: 98
It sounds to me like the snooping by retire stations is the same mechanism that ensures that aliasing is properly resolved on the single core, right?
And if I recall correctly, this was on an arbitrary range of memory, rather than being on a cache-line level? Does this mean that in a multicore situation, there is no “false sharing” risk?
So, at a stroke, another problem the Mill sidesteps and dances around? 🙂