Mill Computing, Inc. › Forums › The Mill › Architecture › switches › Reply To: switches
FWIW, here’s what –O3 on gold gives you. It still needs work.
F("bar") %0;
lsss(b3 %0, 2) %8,
eql(b3 %0, 100) %14,
eql(b3 %0, 0) %7,
retntr(b1 %7, b4 %1), // L22C1F1
retntr(b3 %8, b0 %17), // L22C1F1
pick(b1 %14, b4 %2, b5 %5) %17,
rd(w(3ul)) %5, // L21C1F1
rd(w(4ul)) %2, // L19C1F1
rd(w(1ul)) %1;
// L4C1F1=/home/ivan/mill/specializer/src/test3.c
eql(b7 %0, 7) %12,
eql(b7 %0, 6) %11,
eql(b7 %0, 5) %10,
eql(b7 %0, 4) %9,
retntr(b0 %9, b4 %17), // L22C1F1
retntr(b1 %10, b11 %0), // L22C1F1
retntr(b2 %11, b11 %0), // L22C1F1
retntr(b3 %12, b11 %0); // L22C1F1
lsss(b13 %0, 8) %13,
calltr1(b0 %13, "foo", b14 %0) %4, // L15C1F1
retntr(b1 %13, b0 %4), // L22C1F1
retn(b8 %17), // L22C1F1
rd(w(4ul)) %16, // L19C1F1
rd(w(4ul)) %15; // L19C1F1
Gold has just enough ALUs (8 of 8), and enough popCon slots (5 of 8, although two are redundant) and pick slots (1 of 4) to do this in one instruction, but this code needs 9 of 4 control slots so three instructions is the best it can do without pickifying some of the retns. Even using all the pick slots we only drop the flow count to 6, or two instruction. To get to one, we have to recognize that the return value is the selector value (which I’m sure we’re not going to get LLVM to do).
Still, an ILP of 7.6 ain’t too shabby 🙂