Mill Computing, Inc. Forums The Mill Architecture Introduction to the Mill CPU Programming Model Reply To: Introduction to the Mill CPU Programming Model

LarryP
Participant
Post count: 78

Ivan,

Sorry my question took so much time/effort to answer. That said, I’m very pleased to gain a little glimpse into your simulator, just as I am to see that this issue had already been thought through in considerable detail. Deferring faults as far as feasible seems like a win for speculation.

One rare downside I see is that a byte vector loaded from a NaR address will contain such short NaRs that the hash in the payload may not be much help for tracking down the source of the resulting NaRs. And since the silent behavior of Nones may be nonintuitive to people (esp. those porting existing code to the Mill), some Mill-specific compiler switches (e.g. for extra tests and warnings for Nones/NaRs as addresses) may be desirable — after LLVM is generating usable Mill code.

Happy new year to you and the whole Millcomputing team,

Larry

  • This reply was modified 7 years, 4 months ago by  LarryP.