Mill Computing, Inc. Forums The Mill Architecture Introduction to the Mill CPU Programming Model Reply To: Introduction to the Mill CPU Programming Model

LarryP
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Post count: 78

In order to propagate NaRs and Nones properly, I think all ALUish operations (including mult) will have to check their inputs explicitly for NaRs and Nones. Which leads to a question: What is the proper result for NaR * None?

Which leads to another puzzler: What should be the behavior when a None gets involved in an address calculation? And what is the Mill’s behavior when such an effective address is used by a load or a store operation?