In my opinion a very good solution is to express Power in terms of Cost and then optimize MIPS/total_cost.
Cost would then include the power of the chip, the cooling for the chip… even the floorspace cost if you think about it.
You can only put so many Watts on a square meter of floor space.
There is even application specific cost, since the administrative effort of using more cores or chips can differ per application.
It might also make sense to add maintenance cost, since the MTBF differs too if you put 80 fast chips in a rack vs. 800 slow ones.